Glossary

Electronic design glossary, English and French.

71 terms we use every day in board design, certification and industrialisation, each defined in plain English with its French equivalent, and linked to the article that goes deeper. Handy when a spec, a datasheet or a French supplier switches language on you.

Buses and interfaces

I²C #: Two-wire synchronous serial bus (SDA for data, SCL for clock), created by Philips, now NXP. Several devices share the bus, each identified by an address. It mostly connects sensors, EEPROMs and power managers to a microcontroller over short distances.; Read: I2C bus: protocol, 7/10-bit addressing and pull-ups
SPI (Serial Peripheral Interface) #: Four-signal full-duplex synchronous serial bus: clock, MOSI, MISO and chip select. Faster and simpler than I²C, with no addressing: each peripheral has its own select line. Common for flash memory, displays and converters.; Read: SPI bus: full-duplex, modes 0-3 and MISO/MOSI/CS wiring
UART #: Asynchronous serial link: no shared clock, both sides agree on a baud rate and a frame format. It serves debug consoles and radio modules and, through RS-232 or RS-485 transceivers, industrial links.; Read: UART bus: serial protocol for embedded systems
CAN, CAN FD, CAN XL #: Multi-master differential bus created by Bosch for vehicles, with message-priority arbitration and built-in error detection. CAN FD speeds up the data phase and raises the payload to 64 bytes; CAN XL extends it further to move closer to Ethernet.; Read: CAN vs CAN FD vs CAN XL: speeds, payloads, standards
I3C (MIPI I3C) #: Successor to I²C defined by the MIPI Alliance: same two-wire bus, higher data rate, dynamic addressing and in-band interrupts. Designed for embedded sensors and compatible with most I²C targets.; Read: I3C: MIPI's I²C successor for high-rate embedded sensors
PCI Express (PCIe) #: High-speed point-to-point serial interface linking a processor to its peripherals (NVMe SSDs, FPGAs, network cards) over links of 1 to 16 lanes. Each generation roughly doubles the per-lane rate; from PCIe 6.0 the signalling moves to PAM4.; Read: PCI Express (PCIe) bus: generations, speeds and design
USB 3 (SuperSpeed) #: USB evolution that adds SuperSpeed differential pairs next to the USB 2.0 pair. The successive names (USB 3.0, 3.1, 3.2 Gen 1, Gen 2, Gen 2x2) stand for 5, 10 and 20 Gbit/s, which keeps the naming confusing.; Read: USB 3.2 vs USB4 in 2026: 20-40 Gbps, Type-C, design choice
USB Power Delivery (USB PD) #: Power negotiation protocol over USB-C: source and sink agree, over the CC line, on a voltage and current beyond the default 5 V. It lets an industrial product be powered or charged through a standard connector.; Read: USB-C Power Delivery for industrial products: design guide
LVDS and OpenLDI #: LVDS et OpenLDI; LVDS (Low-Voltage Differential Signaling) is low-swing differential signalling with low emissions and good noise immunity. OpenLDI is the video format built on it to drive embedded display panels.; Read: LVDS and OpenLDI: high-speed video for industrial displays

Memory

DDR4 and DDR5 #: DDR4 et DDR5; Double-data-rate SDRAM generations for processors and SoCs. DDR5 raises the data rate, splits each module into two sub-channels and moves voltage regulation onto the module (PMIC); in exchange, routing and validation get harder.; Read: DDR4 vs DDR5: voltages, speeds and JEDEC specs
LPDDR4 #: Low-power DDR memory designed for mobile and embedded devices, soldered right next to the processor. Its reduced voltages and narrow channels call for length-matched routing and careful signal integrity.; Read: LPDDR4 memory design: routing, signal integrity, power

PCB and signal integrity

PCB (printed circuit board) #: PCB (circuit imprimé); Insulating substrate, often FR-4, carrying etched copper layers that connect the components. Layer count, materials and routing rules follow from electrical, thermal and manufacturing constraints.; Read: How a PCB works: an illustrated guide for engineers
Stack-up #: Stack-up (empilage); Order and thickness of the copper and dielectric layers of a PCB. It sets trace impedance, plane coupling and much of the EMC behaviour; it is agreed with the fabricator before routing.; Read: PCB design guide: stack-up, impedance and EMC compliance
Controlled impedance #: Impédance contrôlée; Characteristic impedance a trace must present (for example 50 Ω single-ended, 90 or 100 Ω differential) to carry a fast signal without reflections. It depends on trace width, dielectric thickness and permittivity.; Read: PCB design guide: stack-up, impedance and EMC compliance Calculator: PCB Trace Impedance Calculator
Differential pair #: Paire différentielle; Two coupled traces carrying a signal and its inverse; the receiver reads the difference, which rejects common-mode noise. PCIe, USB, LVDS and Ethernet rely on them, with length-matching and spacing rules.; Read: High-speed PCB design: stack-up, layers, impedance Calculator: Differential-pair impedance calculator (edge-coupled microstrip and stripline)
Signal integrity (SI) #: Intégrité du signal (SI); Discipline that makes sure a fast signal arrives usable despite reflections, crosstalk, losses and jitter. It relies on simulation before manufacturing and on measurements such as the eye diagram.; Read: High-speed PCB design: stack-up, layers, impedance
Power integrity (PI) #: Intégrité de l’alimentation (PI); Ability of the power network (planes, decoupling, regulators) to hold a stable voltage despite fast current steps. When it is poor, it shows up as noise, jitter and intermittent errors, especially on FPGAs and processors.; Read: FPGA board design: from architecture to industrialisation
Eye diagram #: Diagramme de l’œil; Oscilloscope overlay of the transitions of a fast digital signal. The height and width of the eye opening measure voltage and timing margin; a closed eye points to noise, jitter or excessive loss.; Read: Eye diagram and jitter: how to read signal integrity
Jitter #: Jitter (gigue); Timing deviation of a signal’s edges from their ideal position. It splits into random and deterministic components and shrinks the sampling window of fast serial links.; Read: Eye diagram and jitter: how to read signal integrity
PAM4 #: Four-level pulse amplitude modulation: each symbol carries two bits instead of one with NRZ. It doubles the data rate at the same frequency, at the cost of a smaller noise margin offset by forward error correction (FEC). PCIe 6.0 adopts it.; Read: PCI Express (PCIe) bus: generations, speeds and design
Back-drilling #: Back-drilling (contre-perçage); Drilling out, after plating, the unused part of a through via (the stub). The stub behaves like a resonant line that degrades very fast links; removing it improves signal integrity.; Read: High-speed PCB design: stack-up, layers, impedance
Low-loss laminate #: Stratifié faibles pertes; PCB material with a low dissipation factor (Df), used instead of standard FR-4 for fast links and RF. Several families rely on resins such as PPE, whose supply has been tight.; Read: PPE resin shortage: high-performance PCB impact
EMC (electromagnetic compatibility) #: CEM (compatibilité électromagnétique); Ability of a product to work in its electromagnetic environment without disturbing other equipment. It covers conducted and radiated emissions and immunity (ESD, transients, fields), tested against standards such as EN 55032 and EN 55035.; Read: EMC: electromagnetic compatibility for industrial electronics Calculator: EMC Margin to CISPR / FCC Limit Calculator
ESD (electrostatic discharge) #: ESD (décharge électrostatique); Sudden charge transfer on contact, able to destroy a component. Accessible interfaces are protected with TVS diodes and suitable routing, and tested to IEC 61000-4-2.; Read: EMC: electromagnetic compatibility for industrial electronics

Radio and IoT

RF board #: Carte RF; Circuit board that transmits or receives radio-frequency signals. Impedance matching, 50 Ω lines, ground plane, antenna placement and shielding decide both range and compliance.; Read: RF PCB design: layout rules, impedance control, certification Calculator: Antenna Length Calculator (quarter-wave, half-wave, full-wave)
LPWAN #: Low-Power Wide-Area Network: family of long-range, low-power radio networks for low-data-rate connected devices, including LoRaWAN, Sigfox, NB-IoT and LTE-M.; Read: LPWAN networks compared: LoRaWAN, NB-IoT, Sigfox for IoT
LoRaWAN #: LPWAN network protocol built on LoRa modulation in unlicensed sub-GHz bands, over public or private networks. Per-frame airtime and the regulatory duty cycle cap how often a device can send.; Read: IoT geolocation: why the LoRaWAN 1% duty cycle changes everything Calculator: LoRaWAN Time on Air Calculator
Duty cycle #: Share of time a transmitter may occupy a band. In Europe, ETSI rules cap the default LoRaWAN 868 MHz sub-band at 1%, which limits the number of messages long before range does.; Read: IoT geolocation: why the LoRaWAN 1% duty cycle changes everything Calculator: LoRaWAN Time on Air Calculator
Sigfox #: Ultra-narrowband LPWAN technology for very short, infrequent messages on an operated network. It targets sensors that report a few bytes a day.; Read: LPWAN networks compared: LoRaWAN, NB-IoT, Sigfox for IoT
NB-IoT #: Narrowband IoT: cellular LPWAN technology standardised by 3GPP in licensed spectrum, optimised for deep indoor coverage and very low data rates.; Read: NB-IoT vs LTE-M vs satellite IoT: how to choose
LTE-M #: Cellular LPWAN variant from 3GPP with more throughput than NB-IoT and support for cell-to-cell mobility. Suited to asset tracking and devices on the move.; Read: NB-IoT vs LTE-M vs satellite IoT: how to choose
Bluetooth Low Energy and PAwR #: Bluetooth Low Energy et PAwR; Low-power flavour of Bluetooth for battery-powered sensors and devices. PAwR (Periodic Advertising with Responses), introduced in Bluetooth 5.4, lets a gateway exchange data with a large number of nodes without connections.; Read: Bluetooth 5.4 PAwR : scalable low-power IoT radio architecture
SDR (software-defined radio) #: SDR (radio logicielle); Radio whose signal processing (filtering, modulation, demodulation) runs in software or in an FPGA rather than in dedicated circuits, which makes the equipment reconfigurable.; Read: What Is Software-Defined Radio (SDR), and Why Does It Matter?

Certification and cybersecurity

CE marking #: Marquage CE; Marking by which the manufacturer declares that the product meets the applicable EU legislation (RED, EMC, low voltage, RoHS, etc.). It rests on a technical file and an EU declaration of conformity.; Read: CE/RED certification for IoT: timelines, costs and pitfalls CE / RED certification checklist
RED (Radio Equipment Directive) #: RED (directive équipements radio); Directive 2014/53/EU governing radio equipment: safety, EMC, efficient use of spectrum and, through article 3.3, cybersecurity, mandatory since August 2025.; Read: CE/RED certification for IoT: timelines, costs and pitfalls
EN 18031 #: Three-part series of harmonised standards implementing the cybersecurity requirements of RED article 3.3: network protection, personal data protection and fraud prevention.; Read: CE/RED certification for IoT: timelines, costs and pitfalls
Cyber Resilience Act (CRA) #: Regulation (EU) 2024/2847 that makes cybersecurity mandatory for products with digital elements: security by design, vulnerability handling, SBOM, at least five years of support. Reporting of exploited vulnerabilities has applied since 11 September 2026, everything else from 11 December 2027.; Read: Cyber Resilience Act 2026: IoT and Embedded Compliance Guide Cyber Resilience Act checklist
SBOM #: Software Bill of Materials: machine-readable inventory of a product’s software components (libraries, versions, licences), in CycloneDX or SPDX format. It tells you whether a published vulnerability affects the product.; Read: Cyber Resilience Act for embedded Linux: CVE-2026-53362
CVD (coordinated vulnerability disclosure) #: CVD (divulgation coordonnée); Public policy stating how to report a vulnerability to the manufacturer, and how the manufacturer handles and then publishes it. The CRA makes it mandatory.; Read: Cyber Resilience Act 2026: IoT and Embedded Compliance Guide
CVE #: Common Vulnerabilities and Exposures: unique public identifier (CVE-year-number) assigned to a known vulnerability. Matching the SBOM against published CVEs is the basis of a product’s security monitoring.; Read: CVE-2026-31431 Copy Fail: kernel LPE, Docker escape, Ansible fix
Secure boot #: Secure boot (démarrage sécurisé); Boot chain in which each stage verifies the cryptographic signature of the next, starting from a hardware root of trust, so modified firmware cannot run.; Read: Secure IoT product design: from hardware to field deployment
OTA (over-the-air update) #: OTA (mise à jour à distance); Firmware update delivered over the network. Signed, with rollback on failure and protection against reinstalling a vulnerable version, it is the foundation of security maintenance.; Read: Secure IoT product design: from hardware to field deployment

Compute platforms

COTS #: Commercial Off-The-Shelf: catalogue board or module bought as is. Quick to deploy, but its form factor, power draw and availability horizon are the supplier’s.; Read: COTS or custom board? How to choose, with PCIe examples
MOTS #: Modified Off-The-Shelf: catalogue product adapted to a specific use, for example conformal coating, a different connector, a firmware variant or extended-temperature screening.; Read: COTS or custom board? How to choose, with PCIe examples
COM Express #: PICMG standard for a processor module (Computer-On-Module) mounted on a carrier board. Type 6 exposes PCIe, USB, SATA and video outputs among others; a custom carrier board fits the whole to the product’s mechanics.; Read: COTS or custom board? How to choose, with PCIe examples Our x86 embedded computing work
Carrier board #: Carte porteuse (carrier board); Board designed to host a SoM or COM Express module: it carries the product’s own connectors, power and interfaces, while the module supplies the compute.; Read: SoC vs SoM vs SBC vs custom: how to choose right in 2026
SoC (System-on-Chip) #: Integrated circuit combining processor cores, memory controllers, interfaces and often accelerators (GPU, NPU) on a single die.; Read: SoC vs SoM vs SBC vs custom: how to choose right in 2026
SoM (System-on-Module) #: Module combining processor, memory, storage and power management, ready to mount on a carrier board. A middle ground between an off-the-shelf board and a chip-down design.; Read: SoC vs SoM vs SBC vs custom: how to choose right in 2026
SBC (Single-Board Computer) #: Complete computer on a single board with standard connectors, usable without a carrier. Handy for prototyping, less suited to volume production.; Read: SoC vs SoM vs SBC vs custom: how to choose right in 2026
FPGA #: Programmable logic device whose function is set by a configuration loaded at power-up rather than fixed in silicon. Used for parallel processing, fast interfaces and ASIC prototyping.; Read: FPGA board design: from architecture to industrialisation
RISC-V #: Open, royalty-free instruction set architecture, implemented from microcontrollers up to application processors.; Read: RISC-V in production: opportunities and risks

Embedded software

RTOS (real-time operating system) #: RTOS (système temps réel); Operating system whose scheduler guarantees that a critical task runs within a bounded delay. FreeRTOS and Zephyr are common examples on microcontrollers.; Read: Zephyr vs FreeRTOS vs real-time Linux: RTOS comparison (2026)
Zephyr #: Open-source RTOS hosted by the Linux Foundation, with built-in drivers, networking and Bluetooth stacks, and Linux-style configuration (Kconfig, devicetree).; Read: Zephyr vs FreeRTOS vs real-time Linux: RTOS comparison (2026)
Embedded Linux #: Linux embarqué; Linux kernel and userspace tailored to a given board, on a processor with an MMU. It brings drivers, networking and an ecosystem, at the cost of a longer boot and an attack surface to maintain.; Read: Embedded Linux distributions: 5 criteria to pick the right one
Yocto Project #: Toolset for building a custom embedded Linux distribution from recipes organised in layers. It produces the image, the SDK and, with the create-spdx class, the SBOM at build time.; Read: Embedded Linux distributions: 5 criteria to pick the right one
Buildroot #: Simpler tool than Yocto for generating a minimal embedded Linux image; make legal-info produces the inventory of packages and their licences.; Read: Embedded Linux distributions: 5 criteria to pick the right one
BSP (Board Support Package) #: Bootloader, kernel, drivers and devicetree that make an operating system run on a specific board.; Read: Embedded Linux distributions: 5 criteria to pick the right one
Embedded CI/CD #: CI/CD embarqué; Continuous integration and delivery applied to firmware: every change triggers a build, automated tests, including on hardware rigs, SBOM generation and image signing.; Read: Embedded DevOps: CI/CD, automated tests and firmware deployment

Sensors, power and data

Power management #: Gestion d’énergie (power management); The hardware and software choices that set a product’s consumption: regulators, sleep modes, wake-up rate, energy budget per function. Together they decide battery life.; Read: Embedded power management: make a battery last 3 years Calculator: Battery Life Estimator
MEMS accelerometer #: Accéléromètre MEMS; Silicon micro-machined sensor that measures acceleration: motion, tilt, shock and vibration. Noise, range and power draw drive the choice for each application.; Read: MEMS accelerometer design guide: selection, integration, calibration
Stepper motor #: Moteur pas à pas; Motor that turns in fixed angular increments driven by pulses, so it can be positioned without a sensor. Microstepping subdivides each step for smoother motion.; Read: Stepper motors: drivers, microstepping and motion-control basics
Time-series database #: Base de données temporelle; Database optimised for timestamped series such as sensor readings: compression, aggregation and time-window queries.; Read: IoT database comparison: SQLite, InfluxDB, TimescaleDB

Product development and manufacturing

Electronic design house #: Bureau d’études électronique; Company that designs all or part of an electronic product for a client (specification, schematic, PCB, firmware, industrialisation), without necessarily manufacturing it.; Read: Electronic design services: PCB, firmware, EMC certification
Product specification #: Cahier des charges; Document describing what the product must do and under which conditions: functions, performance, environment, standards, volumes, target cost. It is the project’s technical and contractual reference.; Read: Electronic product specification: write a brief that ships Electronics specification template
EVT, DVT, PVT #: Product validation milestones: EVT (Engineering Validation Test) checks the design, DVT (Design Validation Test) validates the complete product against requirements and standards, PVT (Production Validation Test) validates the volume manufacturing process.; Read: Electronic product design: EVT, DVT, PVT and certification phases
DFM (Design for Manufacturing) #: Design rules that make a board reliably and affordably manufacturable and assemblable: fabricator tolerances, footprints, panelisation, test points.; Read: Design for Manufacturing (DFM) for electronics Electronics DFM checklist
BOM (bill of materials) #: BOM (nomenclature); List of a board’s components with manufacturer part numbers, quantities and alternates. It drives purchasing, cost and exposure to shortages.; Read: Electronic component shortages in 2026: BoM, AVL, second-source
Obsolescence (EOL) #: End-of-Life of a component announced by its manufacturer. Tracking notices and qualifying second sources avoids forced redesigns mid-production.; Read: Electronic component shortages in 2026: BoM, AVL, second-source
NRE (non-recurring engineering) #: NRE (coûts non récurrents); One-off development costs (design, prototypes, tooling, certification), as opposed to the unit manufacturing cost.; Read: Custom electronics design: cost and pricing
Industrialisation #: Moving from prototype to volume production: manufacturing file, production tests, selecting and qualifying the contract manufacturer, pilot run.; Read: Prototype to series: 5 steps to industrialize an electronic product
Production test rig #: Banc de test de production; Automated fixture that checks every manufactured board (in-circuit test, functional test). It is designed alongside the board, test points included.; Read: Electronic product testing and validation: EVT to PVT

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