Electronic product design: EVT, DVT, PVT and certification phases

Electronic product design is the process that turns a customer brief into a CE/FCC certified product ready for series production. The path follows a structured route: scoping, architecture, prototyping (EVT), validation (DVT), industrialization (PVT), then volume manufacturing. At AESTECHNO, an electronic design house based in Montpellier, France, we treat the integration of RED 2014/53/EU, electromagnetic compatibility (EMC) and Design for Manufacturing (DFM) constraints from the very first schematic review as the variable that separates a manufacturable product from a prototype that has to be redesigned.

Whether you operate in IoT, medical, Industry 4.0 or automotive, the obstacles are numerous: rising technical complexity, fast-moving component portfolios, CE and FCC certification requirements, time-to-market pressure. Every decision taken during electronic product design directly impacts manufacturability, reliability and unit cost.

We support project owners from a blank sheet to series production. Our approach rests on a structured EVT/DVT/PVT methodology, EMC integration from the first schematic review, and hardware/firmware co-design that keeps technical coherence at each milestone. Our practice has shipped 65 projects since 2022 with a 100% first-pass success rate on CE/FCC certifications.

Our signature know-how. One of our most distinctive capabilities is delivering custom industrial projects whose PCB is designed by the book, EMC pre-compliant, aligned on IPC standards and ready for high-volume manufacturing as soon as routing is complete. Most design houses deliver a functional design that has to be adapted before it can move to series production. In our practice, the product design is the production design: no costly intermediate phase, no surprise at industrialization. This property is built from the very first line of schematic, it is never bolted on after the fact.

Contents

• Our methodology: from idea to certified product
• Technical scoping and product specification
• Hardware and software architecture
• Rapid prototyping and validation
• EMC-driven certification design
• Industrialization and series production
• Why outsource electronic product design
• Security and cybersecurity from day one
• Common pitfalls and field reports
• In-house compliance bench: TekExpress
• Bottom line: from idea to certified product

Our methodology: from idea to certified product

The EVT/DVT/PVT methodology is a phase breakdown that structures electronic product design as successive steps, each one cleared by precise technical milestones. This staged approach controls risk, keeps budget visibility and guarantees that the final product meets functional, regulatory and industrial requirements from the first iteration.

We apply this proven methodology on every engagement. The phases below structure the work:

Phase	Goal	Deliverables	Validation
Scoping	Define the need	Software Requirements Specification (SRS)	Feasibility review
EVT (Engineering Validation Test)	Validate architecture	Functional prototype	Functional tests
DVT (Design Validation Test)	Validate the design	Pre-series prototype	EMC pre-compliance tests
PVT (Production Validation Test)	Validate industrialization	Pilot run	CE/FCC certification
Series production	Manufacture at volume	Certified product	Continuous quality control

This contractual milestone breakdown lets our customers approve each step before committing to the next, giving full project visibility and budget control at every phase. Our electronic design house methodology page documents the same flow at the engagement level.

Technical scoping and product specification

Technical scoping is the foundation of any successful electronics project. This first phase consists of analysing functional needs, environmental constraints and regulatory requirements to produce an actionable Software Requirements Specification (SRS). A rigorous scoping prevents scope creep and avoids costly mid-development iterations.

We structure this phase around several axes:

• Functional analysis: identification of use cases, user interfaces, communication protocols and expected performance.
• Environmental constraints: temperature range, ingress protection (IP rating), vibration, altitude, indoor or outdoor use.
• Regulatory requirements: standards applicable to the target market, CE marking, FCC, RED 2014/53/EU, IEC 60601-1 for medical, ISO 26262 for automotive.
• Power constraints: battery life target, sleep modes, total energy budget.
• Industrialization goals: target volumes, unit cost, supply chain.

We offer a free 30-minute feasibility audit to help structure the brief. To go deeper into writing an effective electronic product specification, see our electronic product specification guide.

Hardware and software architecture

Hardware and software architecture is the set of structural technology choices for the product: processor, memory, connectivity, sensors, power and firmware organisation. These early-stage decisions condition performance, scalability and total cost of ownership across the product life cycle. Hardware/firmware co-design at this phase prevents late incompatibilities.

Based on the validated specification, we design the optimal architecture by considering every constraint:

• Processor selection: microcontroller (STM32, ESP32, nRF52/nRF54), high-performance SoC (NVIDIA Jetson Orin NX for embedded AI), or FPGA architecture for real-time processing.
• Communication bus design: dimensioning of I2C, I3C, SPI, UART, PCIe interfaces according to the required throughput and topology.
• Wireless connectivity: Bluetooth, Wi-Fi, LoRaWAN, NB-IoT or Sigfox depending on range, throughput and power targets. Our RF expertise guarantees radio performance up to 10 GHz.
• Hardware/firmware co-design: hardware/software partitioning is defined jointly to optimise resources and ease testing. Our practice on Zephyr, FreeRTOS and Yocto/OpenEmbedded covers most embedded platforms.

For high-performance systems requiring DDR4/DDR5, PCIe or HDMI buses, our high-speed expertise ensures signal integrity and specification compliance. Our design house methodology structures every project with clear milestones and defined deliverables.

Rapid prototyping and validation

Rapid prototyping turns the defined architecture into a functional prototype that can be tested in real conditions. This phase converts theoretical specifications into a measurable physical object, identifying gaps between simulation and reality before committing to industrialization and certification investments.

Our teams produce functional prototypes within a few weeks, enabling fast iterative validation:

• EVT prototyping: first functional board to validate the electronic architecture, communication bus performance and base firmware.
• Functional validation: systematic tests of each function (sensors, connectivity, power, interfaces) with measurement instrumentation.
• Controlled iterations: every modification is tracked and approved before integration, preventing regressions and design drift.
• EMC pre-scan: pre-compliance electromagnetic measurements as soon as the prototype lands, anticipating certification issues.

Power management is a central concern from this phase: in our practice, the choice of regulator, sleep modes and battery dimensioning are the key levers that allow IoT products to reach multi-year battery life on a single primary cell.

EMC-driven certification design

EMC-driven certification design consists of integrating electromagnetic compatibility constraints from the very first design phases, rather than treating them as a final step. This proactive approach significantly reduces lab-failure risk and avoids costly redesigns that delay time-to-market.

We integrate EMC constraints from the first schematic review. In our practice, the most frequent certification failures come from decisions taken too late in the design cycle. The areas we systematically address:

• EMC-driven PCB routing: separation of analog and digital ground planes, current loop minimisation, controlled impedance on critical traces, differential pair routing for high-speed signals. Our PCB design know-how covers stackups up to 28 layers and HDI with laser micro-vias.
• Filtering and decoupling: optimal placement of decoupling capacitors, EMI filters on inputs/outputs, ferrites on supply lines.
• Shielding: enclosure design with conductive gaskets, on-PCB Faraday cages for sensitive RF sections.
• Ground management: continuous ground plane strategy, return current management, star grounding for mixed analog/digital circuits.
• PCB stack-up: layer count and stackup chosen for EMC, controlled impedance, signal integrity, crosstalk between traces, differential pair routing for DDR/PCIe/USB, and cost.

We support our customers toward CE/RED certification for IoT products as well as FCC, with EMC integration that secures lab pass. Immunity tests refer in particular to IEC 61000-4-2 (electrostatic discharge) and the IEC 61000-4-x series (transients, RF fields). The radiated emission limits follow CISPR 11/32 Class B, namely 40 dBµV/m at 3 m between 30 and 230 MHz, with margins we typically target at 6 dB below the limit before the accredited lab pass.

Industrialization and series production

Industrialization is the phase that turns a validated prototype into a product that can be manufactured at volume, repeatably and profitably. It covers the choice of long-life components, BOM optimisation, test bench design, and the quality processes required for reliable long-term series production.

We design every product with industrialization in mind from the architecture phase:

• Design for Manufacturing (DFM): optimised component placement, package selection compatible with automated assembly, panelisation rule compliance. See our design for manufacturing electronics page.
• Design for Test (DFT): integration of test points, programming connectors and diagnostic modes to ease quality control in production. Our approach to electronic product testing and validation details the methodology.
• BOM management: selection of components available from multiple distributors, life-cycle verification (active, NRND, obsolete), identification of at-risk parts.
• Obsolescence management: proactive monitoring of critical components, identification of second sources, anticipated replacement strategy.
• Series support: support of the EMS partner during ramp-up, resolution of production issues, minor hardware revisions.

Our scope also covers motion control systems: boards integrating stepper motors for precision positioning in robotics or industrial 3D printing fall within our practice.

Why outsource electronic product design

Outsourcing electronic product design consists of entrusting the development of a product to a specialised design house. It gives companies access to deep skills without the constraints of permanent recruitment. This approach offers operational flexibility, technical risk reduction and significant time-to-market acceleration, while keeping the upfront investment under control.

The concrete benefits of working with an expert design house are multiple:

• Time-to-market acceleration: by hosting every expertise in-house (electronics, firmware, EMC, industrialization), we significantly reduce development lead time compared with a sequential multi-supplier approach.
• Technical risk reduction: an anticipative design avoids routing errors, technology mis-fits and certification failures.
• Access to expertise without hiring: rather than hiring specialised EMC, RF or high-speed engineers (rare and expensive profiles), you get a multidisciplinary experienced team for the duration of your project.
• First-pass certification: our EMC-driven design from day one secures conformance test pass, avoiding redesign and re-test loops.
• Industrial vision: we design for manufacturability, not only for functionality, which prevents bad surprises during industrialization.

For an in-depth analysis of the criteria for choosing a design partner, see our deep-dive on the topic on the AESTECHNO blog.

Security and cybersecurity from day one

Security by design is a discipline that consists of integrating cybersecurity from the architecture phase, not after certification. Connected product security cannot be added afterwards: it has to be embedded from the architecture phase. Security by Design consists of identifying potential threats, defining attack surfaces and implementing matching countermeasures in hardware and firmware, before the very first functional prototype.

Reports from ENISA (the European Union Agency for Cybersecurity) show that, according to ENISA, the majority of IoT vulnerabilities come from architecture choices that cannot be patched later, which is why hardware-anchored security matters. Scanning a product is not enough, as Thierry Durand (Embedded Expertise) emphasises: the real difficulty is prioritising remediation by operational context. The NIST Cybersecurity Framework provides a complementary industrial reference, according to NIST. We integrate IoT cybersecurity from the specification phase, in coherence with ETSI EN 303 645 and the Cyber Resilience Act (CRA):

• Threat modeling: systematic identification of attack vectors (physical interfaces, wireless communications, firmware updates) and criticality classification.
• Zero Trust architecture: every system component is authenticated and its communications encrypted, with no implicit trust assumption.
• Secure boot: secured boot chain with firmware integrity verification at each boot, preventing unauthorised code execution.
• Secure OTA updates: over-the-air update mechanism with cryptographic signature, automatic rollback on failure, and dual-bank firmware via MCUboot.
• Data protection: encryption of data at rest and in transit, secure key management, GDPR compliance for personal data.

To go deeper into end-to-end secure-by-design practices, the AESTECHNO blog covers the topic from architecture to deployment.

Common pitfalls and field reports

A design pitfall is a decision taken too early or too late that compromises certification, industrialization or product reliability. Electronic product design projects rarely fail because of the technology itself, but rather because of methodology decisions made at the wrong time. With 10+ years of experience in embedded system design, we have identified the recurring mistakes that derail projects.

In our practice, we have observed that the most expensive failures come from four main areas:

• EMC handled at end of project: in our practice, the most frequent errors involve late EMC integration. A product designed without EMC consideration from the schematic often requires a complete PCB redesign, sometimes an architecture change, with significant lead-time and cost penalties. We have observed that projects that integrate EMC from the first schematic review pass certification with no extra iteration.
• Unanticipated obsolescence: choosing a component without checking its life-cycle (NRND or EOL status) can stop production a few months after the series launch. In our practice, we systematically verify the longevity of every critical component and identify second sources from the architecture phase.
• Firmware not optimised for field conditions: a firmware that performs perfectly in the lab can fail in real conditions (temperature extremes, unstable supply, RF interference). We test our firmware at the worst-case corners of the specification, not only at nominal conditions.
• Undersized stackup: saving one or two PCB layers to lower unit cost is a common false economy. An inadequate stackup compromises high-speed signal integrity, degrades EMC and can cause certification failure. The premium for a correctly sized stackup is marginal compared with the cost of a respin.

In our experience, the key to success is anticipation: every design decision must be evaluated not only from a functional angle, but also from certification, industrialization and long-term maintainability angles.

Field reports from electronic product design

Three project archetypes where insufficient scoping cascades into defects across the full cycle, recurring observations from our practice, with no client names (NDA):

• Case 1: IoT product with the radio module frozen in the spec before the antenna study. The module was excellent, but its footprint forced a placement incompatible with the ground plane required to pass EN 300 328. Contrary to the intuition that a "certified module is enough", RED certification applies to the final product, not to the module alone. We recommend validating antenna integration with ANSYS HFSS simulation before freezing the module.
• Case 2: industrial multi-PCIe board designed without controlled-impedance stackup. Eye diagrams revealed partial closures on two Gen 3 lanes. Despite the belief that "default routing rules are enough at 8 GT/s", material selection (Isola IS410 vs standard FR-4) and a stackup with continuous reference are decisive. We recommend an audited stackup at scoping, not at the end of routing.
• Case 3: battery-powered sensor with firmware tuned before real-world current characterisation. The theoretical energy budget was met, but quiescent currents exceeded the forecast by 8x. We recommend Nordic PPK2 + Keithley DMM7510 measurement (picoampere accuracy) on the first board, to correlate firmware and hardware before freeze.

Standards, tools and technical signature

Our practice rests on a base of standards and PCB tools used daily: ISO 9001 for quality management, IPC-6012 Class 2/3 for PCB fabrication (stackup, via, trace, controlled impedance), IEC 62304 and ISO 14971 for medical products, RED 2014/53/EU directive for wireless. On the tooling side: Altium and KiCad for schematic and routing, ANSYS SIwave and HFSS for SI/PI simulation and antenna optimisation (AI-assisted optimisation), Yocto/OpenEmbedded for embedded Linux BSP, FreeRTOS and Zephyr for real-time, and CI/CD pipelines with auto-deploy gated on tests. Our PCB portfolio covers up to 28 layers, HDI (laser micro-vias, buried vias), rigid-flex and integrated PCB antennas, all aligned on IPC and EMC pre-compliant from the initial stackup.

Contrary to the belief that a design house delivers a prototype "to be adapted for production", our design IS already a production design. In our practice, EMC pre-compliance, IPC conformity and DFM are integrated from the first routing iteration, not added at the end of the project. This technical signature ties together our PCB portfolio (up to 28 layers, HDI laser micro-vias, rigid-flex), our pre-fabrication ANSYS simulation and our experience with component-shortage mitigation (search for pin-compatible alternates, or full redesign when no drop-in solution exists).

In-house compliance bench: Tektronix TekExpress

An in-house compliance bench is a measurement station equipped to run standard-defined electrical conformance tests before the accredited lab. Our laboratory features a Tektronix oscilloscope with the TekExpress suite, which automates compliance tests for PCI Express, USB 3.x, MIPI, DDR2 / DDR3 / DDR4, HDMI, Ethernet and LVDS. In our practice, we pre-qualify high-speed boards in-house before they reach the accredited lab, which lowers late-stage non-compliance risk and accelerates iterations during the DVT phase.

Contrary to the belief that "an oscilloscope plus an eye-diagram template is enough", standards-grade compliance demands the exact equalisation and reference clock recovery defined by the working groups. On a recent client project, TekExpress reported a measured eye-height margin of 38 mV on a PCIe Gen 3 lane that had passed a generic eye check. Despite the visual pass, the standard requires 25 mV after CTLE plus DFE; without TekExpress this margin would have been invisible until the accredited lab pass. In our practice, this single capability has saved a full DVT iteration on three of the high-speed projects we shipped since 2022. We recommend that any design house claiming high-speed expertise own a standards-grade automated bench, not only a probe and an oscilloscope.

Bottom line: from idea to certified product

Bottom line, the journey from idea to certified product hinges on five disciplines, drawn from our EVT/DVT/PVT methodology. We have measured the impact of each on our 65 projects since 2022.

• EVT/DVT/PVT methodology: scoping, Engineering Validation Test (EVT) prototype, Design Validation Test (DVT), Production Validation Test (PVT), then series. Every milestone is contractual to keep budget and risks under control.
• EMC built into the schematic: ground-plane separation, filtering, decoupling, controlled-impedance stackup. A product designed for certification at routing time clears the anechoic chamber on the first run.
• Hardware/firmware co-design: hardware/software partitioning defined jointly. Immunity tests rest on IEC 61000-4-2 (ESD), RED on directive 2014/53/EU, medical on IEC 60601-1 and ISO 14971.
• Design for Manufacturing (DFM) and Design for Test (DFT) from architecture: placement, panelisation, test points, BOM management and second sources to dodge obsolescence.
• Cybersecurity by design: threat modeling, Secure Boot, signed Over-The-Air (OTA) updates, Software Bill of Materials (SBOM) in CycloneDX or SPDX format, aligned with ETSI EN 303 645 and the Cyber Resilience Act (CRA).

Related articles

These companion articles cover topics adjacent to electronic product design: methodology, specification, manufacturability, validation and certification.

• Electronic design house methodology: our 6-step EVT/DVT/PVT process from spec to certified pre-series.
• Electronic product specification guide: write a brief that gets shipped, with the 8 essential sections.
• Design for Manufacturing in electronics: cost-cutting playbook for high-volume production.
• Electronic product testing and validation: HALT, HASS, EMC pre-scan, ICT, functional benches.
• AESTECHNO blog: deep-dives on PCB, RF, embedded software, IoT cybersecurity and certification.

FAQ: Electronic product design

This FAQ collects the most frequent questions on designing a certified electronic product, lead times, costs, pitfalls and certifications, with concise answers drawn from our practice.

How long does it take to turn an idea into an electronic product?
Lead time depends on complexity, but expect on average 6 to 12 months from design phase to pre-series launch. With our proven EVT/DVT/PVT milestone methodology, we cut wasted iterations and significantly accelerate time-to-market.

What are the main causes of failure in electronics projects?
The three major obstacles are: (1) inadequate EMC design that triggers certification test failure, (2) poor component obsolescence management causing production delays, and (3) firmware not optimised for field conditions, generating reliability issues. Our teams anticipate these risks from the architecture phase.

How do you estimate the cost of an electronics project?
We split costs into 4 categories: (1) engineering (design, routing, firmware), (2) prototyping (PCB, assembly, components), (3) tests and certification (EMC pre-scan, accredited labs), (4) industrialization (test benches, DfX). Our milestone-based approach lets you validate each step before investing in the next.

Can we start without a detailed specification?
Yes, we offer a free 30-minute technical scoping phase to help structure your needs. We turn your vision into actionable technical specifications (SRS) before starting design. This avoids costly mid-project misunderstandings.

Which certifications do you handle?
We support our customers toward CE (mandatory European marking), FCC (United States), as well as sector-specific standards: RED for radio devices, IEC 60601 for medical, ISO 26262 for automotive, and EN 50155 for rail. Our EMC-driven design from day one keeps a 100% first-pass success rate at the lab.