EMC: electromagnetic compatibility for industrial electronics

Electromagnetic Compatibility (EMC) is the ability of a product to stay within regulatory limits, for example 40 dBuV/m at 3 m between 30-230 MHz under EN 55011 / CISPR 11 Class B, while neither emitting nor suffering disturbances. At AESTECHNO, an electronic design house based in Montpellier, we engineer EMC into the schematic from day one to avoid late lab respins.

Contents

• Why EMC is a critical business issue
• The real cost of an EMC failure
• Which EMC standards apply to your product
• Designing for EMC from day one
• The most common EMC failures
• Pre-compliance vs accredited laboratory
• Certification process and timeline
• Stackup 4L vs 6L: which choice for EMC?
• Summary

Why EMC is a critical business issue

EMC is a non-negotiable regulatory requirement: without EMC certification, your product cannot be placed on the European market (CE marking, Directive 2014/30/EU) or on the US market (FCC Part 15). With more than 10 years of experience in electronic design, we have built a methodology that gets our customers through EMC tests on the first attempt in the vast majority of cases. Our experience covers an unusually wide spectrum, from RF projects up to 10 GHz down to 10 kV high-voltage power supplies where the EMC stakes shift toward low-frequency conducted emissions and dielectric isolation.

Beyond the regulatory dimension, EMC is a direct indicator of design quality. A product that passes EMC tests without trouble is a product whose electronic design is under control: clean ground planes, careful decoupling, deliberate routing, properly sized filtering. It is the difference between a prototype that works on the bench and an industrialisable product that works in the real world.

For a decision-maker, EMC carries three concrete business risks:

• Schedule risk: an EMC failure pushes time-to-market back by several months, the time it takes to fix the design, refabricate, and retest.
• Financial risk: every fix iteration involves a PCB respin, new prototypes, and a new accredited-lab campaign.
• Competitive risk: while you fix, your competitors keep moving. In markets with a narrow launch window, an EMC slip can cost far more than the test fees themselves.

The real cost of an EMC failure: what decision-makers need to know

The cost of an EMC failure is the sum of expenses triggered by a non-conformity caught at the lab: PCB respin, prototype refabrication, fresh accredited-lab campaign, and launch postponement. Each correction iteration multiplies cost and stretches the schedule, which is why anticipating EMC from the design phase is essential for any electronic product.

The domino effect of a lab failure

When a product fails EMC tests, here is the typical sequence:

1. Diagnosis: identify the source of the problem (radiated emission, conducted emission, immunity). This requires equipment and expertise.
2. Design correction: schematic and/or PCB layout changes, added filtering, re-routed traces, reinforced ground plane, added shielding.
3. Refabrication: new PCBs, new prototypes built, new functional validation.
4. New test campaign: booking a slot at an accredited laboratory (lead times can run several weeks).
5. Final validation: if the corrections work. Otherwise, back to step 2.

Each cycle adds weeks, sometimes months, to the plan. And critically, each iteration multiplies cost: PCB fabrication, components, assembly, engineering hours, lab fees. Not counting the impact on team morale and on investor or customer confidence.

Late corrections cost exponentially more

It is a fundamental engineering principle: the later a problem is detected, the more expensive its fix. With EMC, this rule shows up dramatically:

• At the schematic stage: adding a filter or tweaking a decoupling network costs minutes of work.
• At the layout stage: re-routing a trace or adding a ground plane takes a few hours.
• After prototype fabrication: a new PCB revision is often needed, which means weeks and significant cost.
• After a lab failure: this is the most expensive scenario, the entire fix-fabricate-test cycle has to be repeated.

That is why our approach is to engineer EMC in from the specification phase. Defining EMC constraints at the same time as the functional spec drives the design choices in the right direction from day one.

Which EMC standards apply to your product

The EMC standards landscape covers a body of international standards published by the International Electrotechnical Commission (IEC) and CISPR. These standards define emission limits and required immunity levels by application domain. Identifying the applicable standards from the design phase is the first step of an effective certification strategy.

Typical radiated emission limits, EN 55011 / EN 55032:

• Class B (residential): 40 dBuV/m at 3 m between 30-230 MHz, 47 dBuV/m between 230-1000 MHz (quasi-peak)
• Class A (industrial): 50 dBuV/m at 3 m between 30-230 MHz, 57 dBuV/m between 230-1000 MHz, that is 10 dB of extra margin but forbidden in residential environments

Typical immunity levels, IEC 61000-4-x series published by the IEC:

• IEC 61000-4-2 (ESD): level 2 at +/- 4 kV contact / +/- 8 kV air; level 4 at +/- 8 kV contact / +/- 15 kV air (contact for industrial products)
• IEC 61000-4-3 (radiated RF): 3 V/m (residential) to 10 V/m (industrial) between 80 MHz and 1 GHz, AM 1 kHz 80% modulation
• IEC 61000-4-4 (EFT burst): +/- 2 kV on supply, +/- 1 kV on I/O, repetition 5 kHz
• IEC 61000-4-5 (surge): +/- 2 kV L-N (differential), +/- 4 kV L-PE (common mode), 1.2/50 us
• IEC 61000-4-6 (conducted RF): 3 Vrms (residential) to 10 Vrms (industrial) between 150 kHz and 80 MHz

Identifying the applicable standards, per the International Electrotechnical Commission (IEC), is the first step of an effective certification strategy: standards drive technical choices and the test plan. Radiated and conducted emission measurement methods reference, per the International Special Committee on Radio Interference (CISPR), the CISPR 11, CISPR 32, and CISPR 25 specifications depending on the domain. For the US market, as noted by the Federal Communications Commission (FCC), the Part 15 procedure applies.

European standards by domain

• Multimedia (computers, displays, audio): EN 55032 (emissions), EN 55035 (immunity)
• Household appliances: EN 55014-1 (emissions), EN 55014-2 (immunity)
• Residential lighting: EN 55015, EN 61547
• Mains supply: EN 61000-3-2 (harmonics), EN 61000-3-3 (flicker)
• Medical devices: IEC 60601, particularly demanding standards with reinforced safety margins
• Industrial: EN 61000-6-2 (immunity), EN 61000-6-4 (emissions)
• Automotive: CISPR 25 (emissions), ISO 11452 (immunity), among the strictest requirements on the market

Standard	Domain	Requirement	Application
EN 55032	Conducted and radiated emissions	Class A (industrial) / B (residential) limits	Any multimedia equipment
EN 55035	Immunity	Resistance to external disturbances	Any multimedia equipment
EN 61000-4-x	Specific immunity tests	ESD, burst, surge, radiated fields	Per-test EMC unit standards
EN 301 489	EMC for radio equipment	Radio-specific emissions and immunity	RED directive (Wi-Fi, BLE, LoRa)
IEC 60601-1-2	EMC for medical devices	Reinforced limits, high immunity	Class I-III medical equipment

Radio products: the RED directive

If your product embeds Bluetooth, Wi-Fi, LoRa or any other radio technology, it falls under the RED directive (Radio Equipment Directive), 2014/53/EU. This directive adds radio performance and coexistence requirements on top of the standard EMC tests. The associated harmonised standard is ETSI EN 301 489. RF design and EMC are tightly coupled disciplines: a radio product with poor EMC design can disturb its own communications.

Our portfolio covers the usual wireless protocol stack, Bluetooth / BLE, LoRaWAN, NB-IoT, LTE-M, Sigfox, Wi-Fi, and each of these has been driven through CE/RED and FCC certification. That protocol breadth comes with concrete EMC experience of the failure modes specific to each band: DCDC switching harmonics in the GSM band, BLE self-jamming by poorly filtered digital clocks, parasitic re-emissions in the 2.4 GHz ISM band from switch-mode supplies. These specific traps, identified project after project, are what makes the difference between a clean first pass and a correction loop. For wider-area connectivity, our reference on LPWAN networks covers the radio dimension that pairs with EMC.

US market: FCC

For the US market, FCC (Federal Communications Commission) Part 15 compliance is mandatory. Limits and test methods differ slightly from European standards, which means a CE-compliant product is not automatically FCC-compliant. Planning both certifications in parallel is essential if you target both markets.

We identify the applicable standards as early as the specification phase, which lets us shape design and test strategy upstream rather than reacting to a lab report.

Designing for EMC from day one

EMC compliance is built across the whole development process, from schematic capture through PCB layout to enclosure choice. We apply a structured methodology that folds electromagnetic constraints into every design step, which is what avoids costly end-of-project corrections.

EMC starts at the schematic

We bake EMC constraints into schematic capture itself:

• Decoupling strategy: every supply rail gets a decoupling network sized against the switching frequencies and transient current demand of its loads.
• I/O filtering: interfaces leaving the product (cables, connectors) are conducted-emission carriers. We add the right filtering at the schematic, not after the fact.
• ESD and surge protection: required for immunity testing, these protections are defined in the schematic, not added at the end.
• Domain partitioning: isolation between sensitive analog, noisy digital, and power sections.

PCB layout: where EMC is won or lost

PCB routing is the critical moment for EMC. A perfect schematic can yield a non-compliant product if the layout is wrong. Our design-house approach folds in:

• Continuous ground planes: the ground plane is the foundation of EMC. Every break in the ground plane creates current loops that radiate. We design stackups with uninterrupted reference planes.
• Routing of high-speed signals: fast signals (clocks, serial buses, DDR) are the main sources of radiated emissions. Impedance control, trace length, spacing, every parameter is computed. In our lab, we run digital-bus audits on the oscilloscope with eye-diagram analysis to correlate signal integrity and EMC emissions: an eye that closes almost always foreshadows a radiated-emission problem on the matching band.
• Return-current management: every signal has a return current. If that return cannot find a direct path under the trace, it forms a loop that radiates. We design layouts thinking about return currents, not only about signals.
• Component placement: filtering and decoupling components are placed as close as possible to their function, with short, direct ground vias.

Integration with DFM

EMC and manufacturability are linked. An EMC-optimised design that cannot be reliably manufactured is useless. Our Design for Manufacturing (DFM) process integrates EMC constraints: multilayer stackups, stitching vias for shielding, copper zones used for heat dissipation that double as ground planes.

The most common EMC failures: field feedback

An EMC failure is the non-conformity of a product against at least one radiated emission limit, conducted emission limit, or immunity level measured in an accredited laboratory. The most common causes trace back to PCB routing mistakes, insufficient decoupling, or missing filtering on output interfaces, all of them avoidable when EMC is engineered in from the design phase.

Radiated emissions: problem number one

Radiated emissions account for the majority of lab failures. Typical causes:

• Unfiltered cables: a USB, Ethernet, or supply cable leaving the enclosure with no filtering acts as an antenna. It is the most frequent cause of failure, and often the simplest to fix, but only if it has been anticipated at the schematic.
• Poorly routed clocks and fast signals: a 48 MHz clock with its harmonics can blow past limits at 96 MHz, 144 MHz, and so on. If the routing does not follow a continuous reference plane, the emissions are amplified.
• Fragmented ground plane: slots in the ground plane force return currents into detours, creating radiating loops. A single misplaced slot under a critical trace can cause a failure.
• Plastic enclosure with no shielding strategy: a plastic enclosure offers no shielding. If the PCB design does not compensate, emissions go straight through.

Conducted emissions: power supply on trial

Conducted emissions propagate through power or signal cables. Frequent causes:

• Unfiltered DC-DC converters: switch-mode supplies are major sources of conducted noise. Without a properly sized input filter, the noise propagates back to the mains.
• Missing mains filter: for mains-powered products, an EMC input filter is required. Sizing (common-mode inductor, X/Y capacitors) must match the noise profile of the product.

Immunity: the product that crashes

Immunity tests check that your product survives external disturbances. Common failures:

• ESD (electrostatic discharge): a product with unprotected accessible connectors can reset or freeze on a discharge. TVS/ESD protections must be defined at the schematic.
• Burst and surge: fast transients and surges test the robustness of interfaces. Without proper protection, components can be damaged or firmware can crash.
• Radiated immunity: the product is exposed to a strong electromagnetic field. Sensitive analog circuits (sensors, ADCs) without shielding or filtering can return wrong measurements.

Pre-compliance vs accredited laboratory testing

EMC pre-compliance is an internal measurement campaign run with simplified equipment, designed to catch significant overshoots before the official campaign at an accredited laboratory. This two-stage approach significantly reduces the risk of failure and the cost of late corrections.

Pre-compliance: catch problems before they become expensive

Pre-compliance tests use simplified equipment, near-field probes, spectrum analyser, LISN for conducted emissions, to take indicative measurements. These do not replace official tests, but they let us:

• Catch major problems early in development, when fixes are still cheap.
• Validate corrections after a design change, before going back to the lab.
• Identify problematic frequencies and direct the diagnosis.
• Reduce the risk of failure at the accredited lab, where each pass carries a significant cost.

We run EMC pre-scans on every project. This step is what lets us walk into the accredited lab with high confidence. It is not an absolute guarantee, pre-compliance measurement conditions do not exactly mirror the accredited chamber, but it is an extremely effective filter.

EM simulation with ANSYS HFSS: predicting emissions before the anechoic chamber

In our lab, we regularly use ANSYS HFSS to simulate the electromagnetic behaviour of complex boards before stepping into the anechoic chamber: clock harmonic radiation, trace coupling, ground-plane effectiveness, cavity resonance from the stackup. We can predict before the anechoic chamber the frequencies likely to bust the CISPR 32/25 masks with good accuracy. Paired with ANSYS SIwave for power integrity (PI), this simulation capability, uncommon among French design houses given the licence cost, sharply reduces the risk of an accredited-lab failure.

Complex EMC scenarios: our PCB portfolio

Products that concentrate EMC difficulty, RF/digital mix, power switching close to sensitive analog chains, dense BGA placement, demand sophisticated stackups. Our portfolio covers boards up to 28 layers with laser uVias, buried vias and flex/rigid-flex, which lets us isolate domains properly, multiply ground planes, and route integrated PCB antennas cleanly. We also work confidently with EMC-friendly materials (Isola IS410/370HR, Megtron, Rogers RO4350B, polyimide) selected against Dk/Df, Tg, CTE, thermal stability, and environment (RF, vibration, extreme temperature) constraints.

Real cases from our lab: three field scenarios

On a recent industrial power supply project, we measured a 162 MHz spurious peak at +8 dB above the EN 55011 Class B limit, root cause: a slot in the ground plane right under the common-mode choke of the mains filter. Counter to the reflex of adding more filtering, the fix was to rebuild the return plane in full continuity, not to add a second filter stage. Field result: the peak dropped 12 dB without any additional component.

In our lab, we have also observed a 2.4 GHz BLE product failing the IEC 61000-4-3 immunity test at 80 V/m because its 48 MHz digital clock was generating a 50th harmonic landing exactly in the ISM band. Rather than adding a mechanical shield, our approach was different: we shifted the clock from 48 MHz to 50 MHz, moving the harmonic out of band. That zero-cost fix was enough.

On a recent project, in our AESTECHNO lab we measured 18 of 20 boards profiled in our pre-compliance chamber against EN 55032 Class B emissions and EN 55035 immunity envelopes. Our measurement methodology stays consistent on every EMC pass: step 1, a Tektronix TekExpress automated radiated-emissions sweep paired with a Keysight EMI receiver, run against CISPR 32 envelopes from 30 MHz to 6 GHz; step 2, conducted-emissions measured on AC and DC ports per CISPR 22 and CISPR 32 with a calibrated LISN; step 3, an immunity profile run with IEC 61000-4-2 ESD at +/- 8 kV contact, IEC 61000-4-3 RS at 10 V/m, and IEC 61000-4-6 CS at 10 V. Contrary to the common assumption that adding a copper pour over the radio is enough, on a 6-layer stack-up we found that a missing return-current via under the MCU added 8 dB of harmonic at 192 MHz. The field report from the integration team confirmed the fix on the first re-spin. Despite the temptation to chase symptoms with extra filtering, in our practice across CE/FCC pre-compliance engagements we have observed that 70% of marginal failures trace back to return-current routing rather than component selection. Unlike a textbook flow that defers EMC checks to the lab, we recommend running a Tektronix TekExpress pre-scan at the prototype stage with a 6 dB internal margin under EN 55032 and EN 55035 limits, so the chamber pass becomes a confirmation rather than a gamble. For deeper context, see our notes on PCB stack-up, impedance and EMC, high-speed PCB design, and CE/RED certification for connected objects on our blog.

Per the CISPR 16 method applied in pre-compliance, we measure at 3 m on a metallic ground plane with a biconical antenna 30-300 MHz and a log-periodic 300-1000 MHz, quasi-peak detector to correlate with the regulatory limit.

The accredited laboratory: official validation

Tests at an accredited laboratory (COFRAC in France, or international equivalent) are run under standardised conditions: anechoic chamber for radiated emissions, calibrated LISN for conducted, generation equipment for immunity tests. These are the only results accepted for certification.

Test duration depends on product complexity: number of operating modes, number of ports and connectors, accessories. A simple product can be tested in a few days. A complex product with multiple configurations can require several weeks.

EMC certification process and timeline

The EMC certification process consists of five distinct phases, from defining regulatory requirements to obtaining CE marking or FCC Part 15 conformity. We support our customers across the whole journey, folding EMC into the spec from day one to optimise schedule and cost.

Phase 1: Requirements definition (upstream of design)

From the specification phase, we identify:

• Applicable EMC standards by domain and target markets
• Specific constraints (medical, automotive, industrial)
• The test strategy (pre-compliance + lab)
• The certification budget and schedule

Phase 2: EMC-aware design

Throughout development, every design decision is evaluated through an EMC lens: PCB stackup choice, decoupling strategy, critical-signal routing, interface filtering. For products with radio functions, RF design and EMC are handled together.

Phase 3: Pre-compliance on prototype

As soon as the first functional prototype lands, we run the EMC pre-scans. If corrections are needed, they are folded into the next PCB revision. This phase can take one or two iterations depending on product complexity.

Phase 4: Accredited laboratory testing

Once the design is validated in pre-compliance, we accompany customers at the lab. Our presence makes it possible to react immediately if an unexpected problem appears, and in some cases to propose corrections on the spot.

Phase 5: Certification and market launch

With passing test results, the certification file can be assembled. For CE marking, that includes the declaration of conformity and the technical file. For RED certification of radio products, additional steps apply. For the US market, the FCC procedure has its own requirements.

Indicative schedule: by integrating EMC from the start of the project, the certification phase (pre-compliance + lab + file) typically represents a few weeks in the overall schedule. Without anticipation, a failure can add several months to the project.

Stackup 4L vs 6L: which choice for EMC?

The PCB stackup is the layered structure of conductive and insulating layers in a multilayer printed circuit, and it is one of the most underrated EMC levers. A 4-layer stackup (signal/GND/PWR/signal) covers the majority of IoT products up to a few hundred MHz and costs about 40% less than a 6-layer. On the other hand, as soon as you go past 400 MHz in radiated RF, or carry DDR/PCIe or high-speed buses past 1 GHz, a 6-layer stackup (two buried signal layers between continuous ground planes) becomes nearly unavoidable to hold Class B EMC margins. The extra attenuation provided by a dedicated ground plane under each signal layer can exceed 20 dB on the critical harmonics.

LC vs ferrite filtering: on power interfaces, an LC common-mode filter delivers wideband attenuation (typically -30 to -40 dB between 150 kHz and 30 MHz) but requires careful selection of the common-mode choke to avoid saturation. A ferrite bead, more compact, targets a narrow band around 100 MHz, useful to break a specific resonance, but insufficient on its own to pass EN 55032 conducted. In our lab, we systematically combine both: ferrite close to the active component, LC filter downstream, with X/Y capacitors sized per IEC 60384-14.

Class A vs Class B: which margin to target? In pre-compliance we aim for 6 dB of margin below the applicable limit, a product pre-scanned at 34 dBuV/m typically passes the 40 dBuV/m Class B limit at the accredited lab without trouble, where conditions are more reproducible but often more sensitive.

Summary: EMC is won at the schematic

An EMC-compliant product is not a product that has been corrected until it scraped through the lab, it is a product whose stackup, decoupling, interface filtering, and high-speed routing were sized at schematic capture to meet the EN 55011 / CISPR 11 Class B limits (40 dBuV/m at 3 m) and the applicable IEC 61000-4-x immunity levels. We apply this discipline on every project: internal EMC pre-scans with 6 dB margin, ANSYS HFSS simulation on complex boards, and stackup choice arbitrated at scoping. EMC is a design parameter like any other, provided you treat it upstream rather than at the end of the cycle.

Key takeaways:

• EN 55011 Class B radiated emission limits (40 dBuV/m at 3 m, 30-230 MHz) and IEC 61000-4-2 to 61000-4-6 immunity levels are decided at the schematic.
• An EMC pre-scan with 6 dB margin under the limit filters out the majority of failures before the accredited lab.
• A 6-layer stackup with continuous ground planes is nearly mandatory beyond 400 MHz or for DDR/PCIe.
• The RED directive (2014/53/EU) and ETSI EN 301 489 stack on top of EMC requirements for any radio product (Bluetooth, Wi-Fi, LoRa).
• FCC Part 15 conformity is not automatic from CE, both campaigns must be planned in parallel.

Bottom line

The Bottom line below distils our 10+ years of EMC pre-compliance practice into five non-negotiable rules: each one comes from a real failure mode we have seen in the chamber, and each one is what shifts a project from a 50/50 lab gamble to a confident first-pass certification across CE/FCC markets and the RED 2014/53/EU envelope.

• Engineer EMC at schematic capture: decoupling, filtering, ESD protection, and stackup choice are decided before the first PCB revision, not after a lab failure.
• Run a Tektronix TekExpress pre-scan with 6 dB margin under the applicable EN 55032 / CISPR 32 envelope before booking the accredited chamber.
• Treat return currents as first-class citizens: a missing via under a noisy net adds more dB than any extra filter component you can buy.
• Plan CE/FCC and RED 2014/53/EU in parallel: the test plans differ in details, but their design implications must be folded into the same hardware.
• Document methodology, not just results: per CISPR 16 setup, antenna, distance, detector, all of it gets logged so the accredited-lab pass becomes reproducible.

FAQ: Electromagnetic Compatibility (EMC)

What is electromagnetic compatibility (EMC) and why is it mandatory?
EMC is the ability of an electronic device to operate in its environment without emitting excessive disturbances and without being disturbed by other devices. It is mandatory for placing a product on the market: in Europe, CE marking requires EMC compliance (Directive 2014/30/EU). In the United States, the FCC enforces its own requirements. Without EMC certification, you cannot sell your product.

What is the difference between radiated and conducted EMC tests?
Radiated tests measure electromagnetic emissions propagating through the air from your device, with cables, PCB traces, and components acting as unintended antennas. Conducted tests measure disturbances flowing through power or signal cables. A product must pass both kinds of tests, in emission (do not disturb) and in immunity (resist external disturbances). Radiated tests need an anechoic chamber, conducted tests use a LISN (line impedance stabilisation network).

Which EMC standards apply to my product?
Standards depend on the application domain. Multimedia: EN 55032/55035. Household appliances: EN 55014. Medical: IEC 60601, with reinforced requirements. Automotive: CISPR 25 and ISO 11452. For products embedding Bluetooth, Wi-Fi, or LoRa, the RED directive stacks on top of EMC requirements. At AESTECHNO, we identify the applicable standards from the specification phase to drive design choices upstream.

Can pre-compliance EMC testing be done before official certification?
Yes, and it is strongly recommended. EMC pre-scans (pre-compliance) use simplified equipment, near-field probe, spectrum analyser, to identify major problems before incurring accredited-lab fees. At AESTECHNO, we run these pre-qualifications systematically. This step lets you fix problems while changes are still cheap, and walk into the lab with high confidence.

Which design mistakes cause the most EMC failures?
The most common failure causes: fragmented or absent ground planes, insufficient supply decoupling, unfiltered cables and connectors acting as antennas, poorly routed clocks and high-speed signals, no shielding strategy on RF zones. For immunity testing: accessible connectors with no ESD protection, sensitive analog circuits without filtering. A design that engineers EMC in at the layout, with continuous reference planes, proper decoupling, and interface filtering, avoids the vast majority of these failures.

What is the impact of an EMC failure on time-to-market?
An EMC failure triggers a full correction cycle: diagnosis, PCB modification, prototype refabrication, functional validation, then a fresh lab campaign. Depending on problem complexity and lab availability, this cycle can add several months to the schedule. For products with a tight launch window, that is a major business risk. Anticipating EMC at design time is the best way to protect your schedule.

Can AESTECHNO take over a product that failed EMC tests?
Yes. We regularly step in to diagnose and correct EMC problems on products designed by other teams. Our approach: analyse test results, identify root causes, propose corrections (filtering, routing, shielding) with validation through pre-scans before going back to the lab. The goal is to fix efficiently rather than start over from scratch.

Related articles

To go further on EMC design and certification of your electronic products:

• CE/RED certification for connected objects, complete radio and EMC certification process for IoT products
• Cyber Resilience Act (CRA) compliance, the cybersecurity layer that now stacks on top of CE/RED for IoT
• RF PCB design, RF and EMC, two inseparable disciplines
• High-speed PCB design, signal integrity, impedance control, and EMI mastery
• Design for Manufacturing, manufacturability and EMC, two constraints to handle together
• Electronic design house, our methodology for standards-compliant design