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AESTECHNO
Updated  38 min read Hugues Orgitello EN

Custom electronics design: cost and pricing

What a custom electronics project costs: seven phases, cost multipliers, hidden line items, certification budgets, and how a design house builds a quote.
NVIDIA Jetson module with heat sink: typical high-end component on a heavy BOM.

"How much does it cost to develop an electronic product?" is probably the first question you ask when you weigh up a new project in 2026. The honest answer: it depends. That answer does not help you build a budget or convince your management to invest. What we can do is explain precisely what the cost depends on, which line items are most often underestimated, and how to structure your project to avoid nasty surprises by 2027.

At AESTECHNO, we have supported companies developing electronic products for more than 10 years, from specification to industrialization. We pre-qualify high-speed boards in-house with TekExpress before the accredited lab pass, which keeps a certification booking from turning into a respin. We have observed across 65 projects since 2022 that well-budgeted projects land on time, while others blow up for lack of upstream anticipation. This guide is written for technical decision-makers, CTOs, project managers and R&D leads who want to understand the cost structure of an electronic development and steer their budget with clear eyes.

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Free resource: our electronics specification template

Key takeaways

Two different cost questions hide behind one budget line. The first is what the product costs to develop and manufacture, structured across seven phases (feasibility, schematic and PCB, prototyping EVT/DVT/PVT, firmware, mechanical, certification, industrialization). The second is what a design house charges to do that work, which is a separate question with its own answer.

We have observed across 65 projects since 2022 that three levers carry most of the budget control: a stabilised specification before kickoff, a right-first-time approach that cuts PCB respins, and internal EMC pre-compliance before the accredited lab. Useful named sources for estimation: Octopart and SiliconExpert (BOM, lifecycle), IPC-6012 (PCB classes), Bpifrance and ADEME (R&D funding and eco-design), INSEE (R&D labour cost baselines).

  • An electronic product development cost breaks down across seven phases, each with its own multipliers and risks. We publish third-party certification-campaign ranges and the cost drivers behind them, but not a project price, because real project numbers vary too much with scope and certification class.
  • According to IPC in IPC-6012 and IPC-2221, the targeted performance class (Class 1, 2 or 3) drives PCB tolerance, traceability and unit cost.
  • According to the IEC in IEC 62368-1 and IEC 60601-1, and according to ETSI in EN 301 489, sectoral regulation is the largest cost multiplier, ahead of any technological choice.
  • Hidden line items (PCB respins, certification failures, component shortages, injection-mould tooling, production test fixtures, post-launch software maintenance) are the leading source of overruns, ahead of initial engineering underestimation.
  • According to ISO 9001 quality discipline and PMI project management practices, milestone-driven delivery with explicit acceptance criteria is the most effective way to keep budget visibility under control.

Contents

Our signature stance: the product design IS the production design. Most design firms deliver a functional design that will need to be adapted before it can move to series: EMC fixes after the first lab pass, IPC adjustments at industrialization, DFM handled at the end. Our discipline reverses the equation. The PCB is designed by the book, EMC pre-compliant, aligned on IPC standards and ready to manufacture as soon as routing is complete. This eliminates the costliest class of overruns: the industrialization respin.

In-house pre-compliance instrumentation. Our laboratory features a Tektronix oscilloscope equipped with the TekExpress suite, which runs compliance tests for PCI Express, USB 3.x, MIPI, DDR2 / DDR3 / DDR4, HDMI, Ethernet and LVDS. We pre-qualify high-speed boards in-house before they reach the accredited lab, which protects the schedule and budget against late non-compliance. This capability sets AESTECHNO apart from most electronic design companies of our size.

Hardware design services cost and firmware development pricing: how a design house quotes

Hardware design services cost is quoted in two structures: non-recurring engineering (NRE) for the design work itself, and the recurring unit cost of the product once it is in production. Firmware development pricing sits inside the NRE, and it moves with scope rather than with any published rate card.

No serious design house publishes a catalogue price for either, and neither do we. Real project numbers vary too widely with scope, certification class and how mature the specification is on day one. What we can do, and what this section does, is name every variable that moves the number, so that when you read two quotes side by side you can tell whether they are pricing the same project at all.

NRE and recurring cost: the two halves of every quote

NRE is everything you pay once: feasibility study, schematic capture, PCB routing, firmware development, EVT/DVT/PVT prototypes, the certification campaign, injection tooling and functional test jigs. Recurring cost is everything you pay per unit: the BOM, the bare PCB, assembly and test, the enclosure, packaging and freight. A quote that blurs the two is unreadable, because a high NRE with a low unit cost and a low NRE with a high unit cost describe completely different businesses.

The split also tells you where to negotiate. NRE is amortised over the production run, so at 100 units it dominates the cost of goods and at 100 000 units it is close to invisible. If your volume is small, the lever is a lower NRE through platform reuse. If your volume is large, the lever is a BOM and an assembly process that a design for manufacturing review has already been through.

Time and materials, or fixed price per work package

Within the NRE, most electronic design companies quote one of two ways. Time and materials means you pay for the hours consumed and keep the freedom to change direction mid-project; you also carry the estimation risk. Fixed price per work package means you pay for a committed deliverable and the design house carries that risk, which is only possible when the work package is described precisely enough to be estimated in the first place.

Our own engagement is on the delivery, not on the hours: we commit to a pre-production optimized working prototype on the first attempt, for a fixed price. That is a commitment to a result rather than to effort, and it is exactly why we insist on a scoping phase before anyone signs anything. How a design partner structures that commitment is one of the things worth comparing, and our design house methodology guide sets out what to ask for.

What actually moves a hardware development services pricing line

Hardware development services pricing is not driven by an hourly rate. It is driven by the scope variables that decide how many engineering hours the project genuinely needs, and by how much estimation risk the design house is being asked to absorb. The list below is what we look at before we can put a number on a work package.

  • Certification target. A non-radio industrial box, a RED radio product and a medical device are three different projects even with identical functionality. See the certification campaign section below for the third-party lab ranges.
  • Prototype iterations budgeted. One EVT build plus one DVT build is a different quote from three respins.
  • Specification maturity. An incomplete specification is priced as risk. A stabilised one, built from our electronics specification template, is priced as work.
  • Validation scope. Bench-checking a board is not the same as running a full environmental and EMC pre-compliance campaign on it.
  • Board complexity. Layer count, high-speed buses, RF content and the targeted IPC class, as covered in our high-speed PCB design guide.

Firmware development pricing and embedded systems pricing

Firmware development pricing follows the same scope logic with one addition that surprises most buyers: it depends heavily on whether the hardware underneath it is stable or still moving. Firmware written against a board that is going to respin twice gets written more than once, and that rework is real work somebody pays for.

Beyond that, embedded systems pricing tracks four things: the number of device drivers to write or port, the choice of runtime (bare metal, FreeRTOS, Zephyr or a Yocto Linux build each carry a different integration cost), the connectivity stack (BLE, Wi-Fi, LoRaWAN or cellular, each with its own qualification burden), and the certification level the software itself has to reach. That last one is the biggest step function: software under IEC 62304 for a medical device, or a product in scope of the Cyber Resilience Act with its SBOM and update-security obligations, carries a documentation load ordinary industrial firmware does not. Our firmware and embedded software expertise page sets out what we cover.

Scope first, quote second

The most cost-effective setup we see is a fixed-price scoping phase run before the main quote. It converts the unknowns into a specification both sides can price honestly, and it is cheap relative to the cost of discovering those same unknowns during DVT. It also gives you something to compare: two design houses quoting against the same stabilised specification are finally quoting the same project.

Assembly and test pricing sits further down the chain and has its own section below. What none of these lines has is a catalogue rate. Each one comes out of the scoping phase as a scope-based number both sides can defend, which is also why this guide publishes third-party certification-campaign ranges but never an AESTECHNO fee.

The six development phases and their cost impact

An electronic development is a sequence of seven phases (feasibility, schematic and PCB, prototyping, firmware, mechanical, certification, industrialization) that each carry their own cost drivers. Understanding this structure is essential to build a realistic budget and to identify the line items you can act on. Each phase adds value, but also complexity, and therefore cost. According to Bpifrance, the French public agency for innovation funding, support schemes such as the Crédit Impôt Recherche (CIR) and the innovation loan typically cover several of these phases when the technical and budget scoping is formalised upstream.

Feasibility study and specification

The feasibility study is the upstream phase that frames the project before any significant budget commitment. In our practice, a preliminary thermal and power budget costing a few engineering-days regularly avoids a redesign downstream. Bill of Materials (BOM), component selection, functional architecture: this phase is the most often underestimated, even though it conditions everything else. A well-structured product specification avoids costly downstream iterations. The cost of this phase scales with the complexity of the need: a simple product based on known technologies needs less investigation than a device combining several interfaces, harsh environmental constraints or specific regulatory requirements.

What makes this phase swing in cost:

  • Number of stakeholders and iterations on the specification.
  • Need for preliminary studies (thermal budgets, power budgets, RF feasibility tests).
  • Complexity of the technical-solution benchmark.

Schematic design and PCB routing

Schematic capture and PCB routing form the technical core of the development. The cost scales directly with circuit complexity: number of components, PCB layer count, presence of high-speed buses (DDR, PCIe, USB 3), RF integration, controlled-impedance constraints. According to IPC, the global standardisation body for printed circuit boards (ipc.org), the IPC-6012 (Qualification and Performance Specification for Rigid Printed Boards) and IPC-2221 (Generic Standard on Printed Board Design) standards define the targeted performance class (Class 1, 2 or 3), which drives tolerance, traceability and unit PCB cost.

A simple 4-layer board with a standard microcontroller represents a far smaller effort than a 10-layer board integrating a processor with DDR4, several high-speed interfaces and an RF section. High-speed signals impose routing constraints that increase design time and require specialist skills. Pinning those choices down before routing starts is what keeps an estimate stable, which is why our electronics specification template asks for layer count, bus list and controlled-impedance targets up front.

Prototyping (EVT / DVT / PVT)

The transition from prototype to series goes through three build stages, Engineering (EVT), Design (DVT) and Production (PVT), each involving PCB fabrication, component assembly and a test campaign. The cost driver here is the iteration count, together with the number of prototypes per build, the fabrication lead time you accept and whether a component shortage forces an unplanned redesign. Rather than repeat the detail, our dedicated guide to the EVT, DVT and PVT prototype stages covers what each build has to prove before the next one is worth paying for.

Firmware and software development

Firmware brings the hardware to life, and its cost scales with feature scope: a controller with a few sensors differs radically from a connected product that needs a complete network stack, over-the-air (OTA) updates and a companion mobile app. The heavy budget lines are communication-stack integration (BLE, Wi-Fi, LoRaWAN, LTE), embedded security (encryption, secure boot, key management), the user interface and the test campaign. The scope variables behind firmware development pricing are set out earlier in this guide.

Mechanical and enclosure

The enclosure is often perceived as a "simple wrapper", but it is a significant cost line. Mechanical engineering must integrate thermal constraints, sealing (IP rating, IEC 60529), ergonomics and manufacturability. The choice between an off-the-shelf enclosure and a custom design changes the budget radically.

Tooling for plastic injection moulding is a heavy upfront investment. You also need to count mechanical prototyping iterations (3D printing, CNC machining) before you freeze the design for production tooling.

Summary table: phases and relative effort

The table below compares the relative effort, risks and optimisation levers per phase. It gives decision-makers a synthetic view before they dive into the detailed phase-by-phase discussion.

Phase Relative effort Main risk Optimisation lever
Feasibility study Low to medium Poorly qualified needs Stabilised specification
Schematic + PCB routing High Respin from a functional bug Upstream DFM and DFT reviews
Prototyping EVT/DVT/PVT Medium to high Multiple iterations Right-first-time approach
Firmware / software Variable (stack-dependent) Undersized radio/security stack Proven platform, automated tests
Mechanical / enclosure Medium (high if custom tooling) Unamortised injection tooling Off-the-shelf enclosure when possible
Certification CE/FCC/RED Medium to high EMC or RED failure in the lab Internal pre-compliance
Industrialization (DFM/DFA) Medium Series scrap, cost of non-quality DFM integrated from schematic
Effort distribution by development phase Bar chart comparing the relative engineering effort of the seven development phases, from specification to industrialization. Relative engineering effort by phase qualitative scale, varies with complexity and regulatory sector low medium high Feasibility specification low-medium Schematic PCB routing high Prototyping EVT/DVT/PVT medium-high Firmware network stack, OTA variable Mechanical enclosure, tooling medium Certification CE/FCC/RED medium-high Industrial. DFM/DFA, jigs medium upstream development compliance downstream (series)
Figure 1. Relative effort by phase: PCB routing and firmware concentrate the heaviest load, while feasibility remains the most profitable investment because it conditions every downstream line item.

Industrialization (DFM / DFA)

Design for Manufacturing (DFM) is the phase where the product is optimised for series production. A design that works in prototype form may turn out to be impossible or too costly to produce at scale. This phase covers PCB adaptation to series-fabrication constraints, component selection driven by long-term availability, and the definition of assembly processes.

A well-run DFM cuts unit production cost. A neglected DFM multiplies scrap, rework and cost of non-quality in series.

What multiplies hardware development cost

Cost multipliers are the project parameters that, at equal complexity, weigh heavily on the final budget of a custom hardware development. We distinguish six families: product complexity, target volume, sectoral regulatory constraints, radio connectivity, finish level and timeline. Identifying these factors at scoping time lets you make informed trade-offs between features, quality, schedule and cost. At AESTECHNO, we have observed that two projects of equivalent complexity can diverge significantly in final budget based purely on sectoral regulation and target volume choices.

Product complexity

This is the most obvious factor and also the hardest to quantify in advance. PCB layer count, presence of high-speed signals, RF module integration and advanced power management all increase engineering time and respin risk.

A single-board product with a microcontroller and a few sensors is in a totally different complexity class from a multi-board system with an application processor, DDR memory, cellular connectivity and a touch-screen interface.

Production volume

Target volume influences development cost as much as unit cost. For a prototype or a small batch, we prioritise speed and flexibility, accepting a higher unit cost. For larger volumes, the industrialization investment (DFM, tooling, test jigs) is amortised over the quantity and reduces unit cost.

The transition from prototype to series is a topic in its own right, covered in our guide on prototype to series industrialization.

Unit cost as a function of production volume Curve showing how non-recurring engineering (NRE) is amortised against unit cost across volumes of 100, 1k, 10k and 100k units. Unit cost vs volume, NRE amortisation Per-unit cost = (NRE / volume) + BOM-assembly-test cost Cumulative volume (log scale) Unit cost (relative) 100 1 000 10 000 100 000 BOM + assembly + test floor full NRE very high break-even typical small IoT stabilised consumer NRE negligible cost = BOM Reading 100 u: NRE dominates, costly proto 1k-10k u: margin tension zone 100k u: BOM = critical line item
Figure 2. Unit cost drops sharply between 100 and 10 000 units because NRE (engineering, tooling, test jigs) amortises over the volume. Beyond that, BOM and assembly become the main optimisation lever.

Regulatory constraints

A standard consumer product needs only classic CE marking. A medical device falls under IEC 62304 for software and the MDR for placing on the market. Automotive equipment must comply with IATF 16949. An aerospace product follows DO-254 and DO-178C. Each regulated sector adds layers of documentation, testing and validation that significantly increase development cost. According to the IEC, the International Electrotechnical Commission (iec.ch), and according to ISO, the International Organization for Standardization (iso.org), the pair IEC 62368-1 (audio/video/ICT equipment safety) and IEC 60601-1 (medical electrical) governs most safety requirements outside automotive, while the IEC 61000-4-2 to IEC 61000-4-6 families cover industrial EMC tests. On the cybersecurity side, the NIS2 directive and the Cyber Resilience Act (CRA) impose Software Bills of Materials (SBOM, CycloneDX or SPDX) and practices aligned with NIST SP 800-218 for digital products.

Connectivity

Each communication technology adds a layer of technical and regulatory complexity. Bluetooth Low Energy has become relatively accessible thanks to pre-certified modules. Wi-Fi adds power-consumption and certification constraints. LTE or NB-IoT pull in operator certification and recurring connectivity fees. Satellite communication still sits an order of magnitude above in complexity and cost.

Finish level

There is a wide gap between a functional prototype (proof-of-concept) and a finished product ready for sale. The PoC validates a technical concept. The finished product integrates the production enclosure, the certifications, user documentation, packaging and a guaranteed reliability over the product life. This step from PoC to sellable product often represents a large share of the total budget.

Timeline and urgency

A tight schedule has a price. Accelerated PCB fabrication, expedited component sourcing and emergency team mobilisation all generate surcharges. Conversely, a realistic schedule from the start lets you optimise sourcing cost and plan resources efficiently.

Variables that multiply development cost Qualitative comparison of budget impact across choices: 4 to 8-layer PCB, fine-pitch BGA, RED compliance, medical regulation, multi-SKU. Typical multipliers on development effort at equal functional complexity, baseline x1 = consumer industrial IoT x1 x1.5 x2 x2.5 x3+ PCB 4 to 8 layers BGA < 0.5 mm pitch RF module (BLE, LoRa) RED + EN 301 489 compliance Cybersecurity (NIS2, CRA, SBOM) Medical (IEC 60601, MDR) Automotive (IATF 16949, AEC-Q) 3-5 SKUs (regional variants) Stacking factors A multi-SKU medical product with certified RF can stack x4 to x6 vs the baseline. Anticipate this stack in the initial specification.
Figure 3. At equal functional complexity, certain technical choices (fine-pitch BGA, certified RF, medical sector, multi-SKU) multiply development effort. Sectoral regulatory factors dominate technological factors by a wide margin.

Electronics assembly pricing and what a unit really costs to manufacture

Electronics assembly pricing is the recurring half of the cost of goods: what it costs to turn a validated design into finished units, run after run. It is quoted separately from the design work, it scales with volume, and it is where electronic manufacturing costs are actually decided.

An assembly quote is built from a handful of lines any electronics manufacturing services (EMS) provider will recognise. Understanding them is what lets you compare two quotes that look nothing alike on the surface, and it is the difference between negotiating a price and negotiating the design that produces that price.

What an electronics assembly quote contains

  • Setup and programming. Pick-and-place programming, stencil, first-article inspection. Charged per run, so it weighs most on small batches.
  • Placement. Usually priced per component placed, with surcharges for fine-pitch BGA, bottom-side placement and anything needing a second reflow pass.
  • Soldering and inspection. Reflow, selective or wave soldering for through-hole parts, automated optical inspection (AOI), X-ray for BGA joints.
  • Test. In-circuit or flying-probe test, functional test on your jig, in-line firmware programming, calibration where the product needs it.
  • Finishing. Conformal coating, potting, enclosure assembly, labelling, packing.

On top of those sits the bare PCB, quoted per panel and driven by layer count, surface finish and the IPC class you specified, and the BOM itself, which on a dense industrial board is usually the largest single line. Component lifecycle risk belongs in the same conversation: a part screened through Octopart for multi-source availability and through SiliconExpert for NRND and end-of-life status is a part that will not force a redesign halfway through the production run.

Why a unit price is a design output, not a purchasing outcome

Two boards with the same schematic can differ substantially in assembly cost because one panelises efficiently, keeps every part on a single side and needs one reflow pass, while the other does not. That is why we treat electronic manufacturing costs as a design deliverable: the choices that set them are made at placement and routing, months before anyone asks an EMS provider for a price. Our position is that the product design is the production design, and a design for manufacturing review exists precisely to keep the unit price from being decided by accident. On a custom COM Express carrier board we designed around Intel processors, the product went into volume production in the thousands per year with no manufacturing-driven redesign, and it has been shipping for three years without a support call back to us. Our industrialization expertise page describes how we run that handover.

CE, RED and FCC certification campaign cost

Certification is the one part of an electronics budget where usable public figures exist, because the invoice comes from a third-party laboratory rather than from a design house. No product reaches the European market without CE marking, none reaches the United States without FCC authorisation, and any radio adds the RED directive on top of both.

The ranges below are illustrative third-party lab market ranges, not AESTECHNO fees. They vary by product, by the applicable directives and by the number of tests in the matrix. We publish them because a buyer building a first budget needs an order of magnitude, and because the alternative, discovering the number after DVT, is how certification turns into a schedule crisis.

What a CE and RED campaign costs in Europe

For a connected product with a single RED radio module, a realistic starting point from our own campaigns is €12,000 to €15,000 for the full CE campaign, and that is already with a pre-certified radio module. That figure is the third-party lab and test-matrix cost, not our design fee, and it varies with the product, the applicable directives and the number of tests. It covers EMC, the radio itself, ESD, EMF, immunity and susceptibility, and security testing, and it can be lower in specific cases. It does not yet include Cyber Resilience Act (CRA) testing, which applies to some products and not others, and it is heavier again for medical, automotive and other regulated device classes.

A simple non-radio product can take the self-certification route, which keeps the cost modest. That does not change the manufacturer's liability, which is identical whichever conformity route you take, but it leaves you with no third-party test evidence to stand on if a field incident is ever investigated. A radio product cannot take that shortcut in practice: under RED, the declaration of conformity has to be backed by radio and EMC test evidence from an accredited lab. According to ETSI, the European Telecommunications Standards Institute (etsi.org) and CEPT (cept.org), the harmonised standards EN 301 489 (radio EMC) and EN 300 328 (2.4 GHz ISM band) structure most RED test campaigns. Our CE and RED certification guide walks through the sequence.

What FCC adds for the United States

The United States is one of the markets we serve, and on that side third-party labs put an FCC ID from about $1,100 for the simplest filing, with a pre-certified-module product more typically $3,000 to $10,000 and a dual-band Wi-Fi device $8,000 to $20,000 (per JJR Lab and MarkReady). Those are illustrative lab ranges too, and the same caveats apply: they move with the product, the applicable rules and the number of tests. If you need both markets, running FCC alongside CE and RED in a single campaign typically adds only 20 to 30% over CE and RED alone, because the test setups overlap heavily; the tests are similar and only the measurement methods and limits differ. Doing them separately means paying for two campaigns.

The cheapest campaign is the one you pass first time

Certification cost scales with the number of applicable standards (EMC, electrical safety, radio, SAR), with the application sector, and above all with the quality of the pre-compliance work done before the booking. Our laboratory runs Tektronix TekExpress compliance measurements on high-speed boards, and EN 55032 protocol measurements with near-field probes during DVT, before anything reaches an accredited lab. Every project we have taken to certification has passed on the first attempt. The regulatory framework is also device-specific: a partner who has never taken a medical device through certification will not get far, because the rules there have grown far heavier since 2018 with the EU Medical Device Regulation (MDR). Match the design firm to your device class before you start.

The hidden electronics manufacturing costs nobody mentions

The hidden costs of an electronic development are the line items that surface during the project even though they were not budgeted at scoping time. The most frequent are: PCB respins, certification failures, component shortages, injection-mould tooling, series test fixtures and post-launch software maintenance. Knowing them upfront lets you build realistic provisions and reduce financial risk. In our practice, these hidden line items are the leading source of overruns, well ahead of an initial underestimation of engineering effort.

PCB respins

A respin is a new version of the printed circuit board made necessary by an issue identified during prototyping. Each respin involves schematic and/or routing changes, a new fabrication, a new assembly and new test campaigns. The cost of a respin is not only financial: it is also time lost on the schedule.

The right-first-time approach aims to minimise these iterations by investing more in design review, simulation and validation before fabrication.

Failed certification

A common pattern we observe in our lab: a failure on EMC or radio certification tests forces a partial or complete redesign, followed by another lab campaign. We have measured these round trips as the single largest cost-and-delay event of a project. A solid pre-compliance strategy, using EN 55032 protocol measurements with internal near-field probes, sharply cuts this risk before the accredited lab pass. In our practice, the protocol relies on Tektronix TekExpress pre-scans applied during DVT, well before the 2026 lab booking window.

This is the real reason to bring in a professional electronic design company early. If a design has not been handled by people who certify products for a living, the worst case is not a retest, it is starting over: redesigning the whole board and rerunning the entire campaign. Hiring proven engineers is essentially insurance; things can still go wrong, but they stay manageable rather than catastrophic. Regulation is also device-specific: someone who has never taken a medical device through certification will not get far, because the rules there have grown far heavier since 2018, with the EU Medical Device Regulation (MDR) tightening them. Match the design firm to your device class before you start.

Component shortages

The electronic component market is subject to shortage cycles that can force a redesign mid-development. A part selected at specification time can become unavailable months later, forcing the team to find an equivalent, modify the schematic and revalidate the design.

Plastic injection tooling

For custom enclosures in injection-moulded plastic, the tooling (the mould) is a heavy upfront investment. This cost is often underestimated, even more so if design changes force tool rework or replacement.

Production tests

Series production needs test means: functional test jigs, in-series firmware programming, integrity testing, calibration. Designing and building those tools is a development cost often forgotten in the initial budget.

Post-launch software maintenance

Once the product hits the market, development does not stop. Bug fixes, security updates, feature evolution and technical support: software maintenance is a recurring cost that must be anticipated from product design.

Cost-effective electronics design: reducing cost without sacrificing quality

Reducing cost without compromising quality consists of activating five precise levers. These levers are: specification stabilisation, right-first-time approach, DFM (Design for Manufacturing) integration from the schematic, internal EMC pre-compliance and reuse of proven platforms. That is what cost-effective solutions mean in custom electronic design: taking the right decisions at the right time, and investing at the key stages to avoid downstream overruns. According to ADEME, the French Agency for Ecological Transition (ademe.fr), eco-design principles applied from the upstream phase reduce the material and energy footprint of the finished product while optimising manufacturing costs.

Define a precise specification from the start

Specification changes mid-project are the leading cause of budget overruns. A complete product specification that defines features, expected performance, environmental constraints and target volumes lets you size the project correctly from the start.

Aim for right-first-time

The right-first-time approach consists of investing more upstream (deep design reviews, simulations, risk analyses) to reduce iteration count downstream. Each respin avoided is a direct saving of time and money. Despite the apparent cost of upfront review hours, we have measured that this approach is the most effective lever to keep the overall budget under control. Contrary to the temptation to ship a "quick first prototype", in our practice the second pass with full-stack EMC pre-checks closes the budget faster than three respin loops.

Integrate DFM from design

Thinking about manufacturability from the design phase, not after prototyping, avoids costly redesigns at industrialization. Integrated DFM optimises component placement, assembly processes and production testability.

Run EMC pre-compliance before the lab

Electromagnetic compatibility tests in an accredited lab are expensive. Performing pre-compliance measurements internally lets you identify and fix issues before the official pass, avoiding failures and costly retests.

Reuse proven platforms

Rather than designing every project from a blank sheet, reusing proven hardware and software bricks (System-on-Module / SOM, standard MCUs such as STM32, ESP32, Nordic nRF52, Raspberry Pi Compute Module with mature ecosystems, well-mastered firmware platforms such as FreeRTOS, Zephyr, Yocto, EDA design tools such as Altium and KiCad) reduces development time and technical risk.

Choose a pre-certified radio module over a chip-down design

For any connected product this is the single largest affordability lever, and it is decided at the schematic, not at the lab. A pre-certified module (Espressif ESP32, Nordic nRF52) carries its own modular FCC/CE radio approval, which covers the module and only the module. Your certification does not inherit it: the complete product still has to pass its own EMC campaign, as our CE and RED certification guide sets out. A chip-down radio (designing the RF front-end and antenna yourself) instead puts the full radiated-emissions and intentional-radiator campaign on your project. Per MarkReady's FCC cost breakdown, that difference is $5,500 to $14,500 in certification alone, roughly 60 to 80% of the FCC certification cost, and about half the timeline. That percentage is for the US FCC route: on the EU side a full CE and RED campaign still starts in the €12,000 to €15,000 region even with a module, so the saving does not transfer one for one. Chip-down still wins at very high volume, or when the module cannot meet size, cost-at-scale or RF-performance targets, and that is exactly the arbitration we run with you, as your design partner, before the stackup is frozen. Choosing the affordable path on purpose is what expert design looks like.

In-house vs outsourced development

The arbitration between an in-house team and an external design firm is a structural choice between fixed costs (salaries, tools, training, social charges) and variable costs (per-project or fixed-price billing). It turns on expected project volume, the skills already in place, time-to-start and how intellectual property is handled. According to INSEE, the French national statistics institute (insee.fr), and according to Kompass, a reference B2B directory (kompass.com), France hosts several hundred electronic design firms, with cost structures that vary with location and specialisation.

NRE cost vs recurring cost per unit A 2x2 matrix separating one-off costs (NRE) from recurring per-unit costs, with examples for each category. NRE vs recurring: where every line item lands NRE = Non-Recurring Engineering, paid once. Recurring = paid per unit produced. NRE, one-off costs paid once, amortised over volume Recurring, cost per unit multiplied by produced volume Hardware study, schematic, PCB routing plastic injection tooling functional + ICT test jigs SMT stencil masks EVT/DVT/PVT prototypes Compliance + software CE, FCC, RED certification accredited lab tests (EMC, RF) initial firmware development technical documentation production line setup BOM (raw material) electronic components bare PCB (per-unit fab) moulded / machined enclosure packaging + accessories pre-certified modules if used Assembly + test + logistics SMT pick-and-place reflow soldering + AOI in-series firmware programming functional test + calibration freight, storage, warranty
Figure 4. A structuring distinction to keep at scoping: a realistic budget separates NRE (paid once) from recurring costs (per unit). The lower the target volume, the heavier the relative weight of NRE in the cost of goods.

Rather than repeat that analysis here, we keep a dedicated decision framework: Make or Buy, seven criteria for choosing between in-house design and outsourcing, which works through fixed versus variable cost, skill coverage (hardware, firmware, RF, EMC, certification), time-to-start and contractual IP transfer in detail. Partner location shapes the cost structure too, and what a design partner actually commits to is worth comparing before price is: our electronic design services guide sets out what to ask for. The hardware design expertise page lists the skills an external team brings on day one.

Working with electronic product development experts: how we keep the budget under control

What you buy from electronic product development experts is not hours, it is the overruns that never happen. Budget control at AESTECHNO rests on three things: an estimate broken down by phase and deliverable, milestones with explicit acceptance criteria, and technical risks raised the week we see them rather than at delivery.

For a decision-maker, budget visibility matters as much as the technical quality of the deliverable, so there is no tunnel effect. Each phase carries its own estimate, which lets you see the budget split and prioritise the investments. Each milestone has a defined deliverable and an acceptance criterion, so progress and budget consumption stay visible. Anything that moves the budget is discussed while it is still cheap to act on, because a problem identified early always costs less to fix than a problem found late.

Experience across varied complexity

With more than 10 years of experience and projects spanning a wide complexity range, from a simple sensor board to a complete embedded system with connectivity and certification, we have built a reliable estimation capability. Across 65 projects since 2022, we know what is expensive, what is risky, and where to spend effort to optimise the cost-result ratio. We deliver 100% success rate on CE/FCC certifications when the EMC pre-compliance protocol is followed.

Real-world cases: three archetypes of budget drift

The overruns we observe most often, with their root cause and our recommendation. No customer names (NDA), but recurring patterns any product decision-maker will recognise.

  • Case 1: certification respin after RED failure. A board passes functionally, fails in the lab on EN 301 489 (radio EMC); the team goes back to routing to rework planes and filters. Contrary to the idea that a "first pass" is economical, the respin (PCB plus components plus a new lab booking) wipes out any saving made on the initial design, and it lands at the worst moment in the schedule. We recommend an internal EMC pre-scan with our Tektronix TekExpress instrumentation before any billed lab campaign.
  • Case 2: redesign for component shortage. An MCU goes out of stock without a pin-compatible alternative, forcing schematic, routing and sometimes firmware rework. Contrary to the temptation to wait for an announced restock, the lost product window typically costs more than the redesign. We recommend a SiliconExpert analysis (lifecycle, EOL, NRND) and Octopart screening (multi-source) at BOM scoping, not at the end of the project. In practice we have helped several clients through shortage exposures by finding and validating viable alternatives, and we have run complete redesigns when no alternative existed.
  • Case 3: EMC rework on a product already in series. A batch ships, a firmware change shifts the emitted spectrum, the product drops below compliance. Contrary to the belief that "a certified product stays certified", any significant change re-opens RED conformity. We recommend an EMC change-control procedure from production onwards, with an internal pre-scan before each radio-firmware revision.

Budget estimation tools and standards

Reliable estimation rests on named, structured data sources. According to Octopart and according to Findchips, the aggregated multi-distributor BOM price is available for direct lookup. According to SiliconExpert, the lifecycle data (Not Recommended for New Designs / NRND, End of Life / EOL, RoHS/REACH compliance) lets us filter risky components at scoping. According to Digikey and according to Mouser, the spot stock and distributor lead times shape the sourcing strategy. On the public-funding side, according to Bpifrance, the Crédit Impôt Recherche (CIR) and the innovation loan cover part of eligible development. According to ADEME, eco-design subsidies support projects that limit their material footprint. On the certification side, the cost framework depends directly on the targeted IPC class (Class 1 consumer, Class 2 industrial standard, Class 3 medical/aerospace/military): each class imposes different design rules, tolerances, traceability and tests, and the unit PCB cost rises with the class because Class 3 adds tolerances, coupon testing and traceability that Class 2 does not require.

Contrary to the temptation to pick the cheapest possible BOM, a slightly more expensive multi-source BOM is almost always the cheaper decision once the respin risk is priced in. Despite the higher headline figure on day one, the avoided respin pays back several times over. Our signature stance, the product design IS the production design, with EMC pre-compliance and IPC integrated from the schematic, is precisely aimed at eliminating the costliest class of overruns: the industrialization respin. Combined with our shortage-mitigation experience (pin-compatible alternatives or, where none exists, a focused redesign), this approach stabilises the budget across the whole programme, not only at prototype delivery. Running TekExpress pre-qualification before the accredited lab is what keeps the certification milestone off the critical path.

Bottom line

  • An electronic product development cost is structured across seven phases, and the line items most often underestimated are upstream (specification, feasibility) and downstream (industrialization, post-launch maintenance).
  • Sectoral regulation is the single biggest cost multiplier; medical, automotive and aerospace dominate any technological choice.
  • Hidden costs (PCB respins, certification failures, component shortages, injection tooling, production test fixtures, software maintenance) drive most overruns. Provision for them at scoping.
  • The most effective levers to reduce cost without sacrificing quality are: stabilised specification, right-first-time, integrated DFM, internal EMC pre-compliance and reuse of proven platforms.
  • Estimation transparency, with phase-by-phase budgets and contractual milestones, is the most reliable way to avoid the tunnel effect and steer the project budget from kickoff through to series production.

Free 30-minute project estimate

Have an electronic product project? Tell us about your need. We will offer a first phase-by-phase budget scoping, no commitment.

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Why trust AESTECHNO?

  • 10+ years of expertise in electronic design and embedded systems.
  • 65 projects since 2022, from prototype to series production.
  • 100% success rate on CE/FCC certifications when our EMC pre-compliance protocol is followed.
  • Right-first-time approach: fewer iterations, controlled budget.
  • French design firm based in Montpellier, single point of contact, same time zone.

Article written by Hugues Orgitello, electronic design engineer and founder of AESTECHNO. LinkedIn profile.

Frequently asked questions

This FAQ groups the most frequent questions on budget estimation and consists of answering directly the points that condition the initial scoping of an electronic product.

How are custom electronics design services priced?

Through NRE (the design work) plus the unit manufacturing cost. NRE is quoted time-and-materials or fixed-price per work package; the main quote drivers are certification targets, prototype iterations, specification maturity and included validation, not the hourly rate. A fixed-price scoping phase first is the most cost-effective way to de-risk the rest.

How much do hardware design services cost?

There is no catalogue rate, and any design house quoting one before reading your specification is guessing. Hardware design services cost is driven by scope: the certification target, the number of prototype iterations budgeted, how mature the specification is, the validation included, and board complexity (layer count, high-speed buses, RF content, IPC class). The reliable way to get a comparable number is a fixed-price scoping phase first.

How is firmware development priced?

Firmware development pricing sits inside the non-recurring engineering budget and tracks the number of drivers to write or port, the runtime (bare metal, FreeRTOS, Zephyr or a Yocto Linux build), the connectivity stack and the certification level the software must reach. It also depends on whether the hardware underneath is stable: firmware written against a board that will respin gets written more than once.

How are embedded systems priced?

Embedded systems pricing combines the hardware and the firmware scope with the integration work between them. The step functions are regulatory rather than technical: software under IEC 62304 for a medical device, or a product in scope of the Cyber Resilience Act, carries a documentation and testing load ordinary industrial firmware does not. Production volume then decides how much of that non-recurring cost lands on each unit.

How much does it cost to manufacture electronics?

Per-unit electronic manufacturing costs are the sum of the BOM, the bare PCB, assembly, test and finishing, plus the share of non-recurring engineering amortised over the run. At 100 units the non-recurring share dominates; at 100 000 units the BOM does. The design decides most of it, which is why a DFM review pays for itself earlier than a purchasing negotiation does.

What does an electronics assembly quote include?

Electronics assembly pricing normally breaks down into setup and programming per run, component placement (with surcharges for fine-pitch BGA or double-sided boards), soldering and inspection including AOI and X-ray on BGA joints, electrical and functional test with in-line firmware programming, and finishing such as conformal coating, enclosure assembly and packing. The bare PCB and the BOM are quoted separately.

How much does it cost to develop an electronic board?

The cost depends on circuit complexity (component count, PCB layers, high-speed interfaces, radio connectivity), prototyping iteration count and required certifications. Each project is unique. We recommend defining a precise specification as the basis for estimation. We publish third-party certification-campaign ranges and the cost drivers behind them, but not a project price, because real project numbers vary too widely with scope.

What are the main cost line items?

The major line items are hardware design (schematic + PCB routing), firmware/software development, prototyping (fabrication and assembly), certification (CE/FCC/RED), mechanical (enclosure) and industrialization (DFM/DFA, tooling, test jigs). The relative weight of each line varies with the type of product.

How long does it take to develop an electronic product?

Typical lead time runs from a few months for a simple product based on mastered technologies, up to over a year for a complex system needing several iterations and sectoral certifications. The schedule depends on technical complexity, component availability and the customer's responsiveness on validations.

How do I avoid budget overruns?

The three most effective levers: a complete and stabilised specification before kickoff, a right-first-time approach that cuts respins, and transparent communication between the customer and the development team. Provisioning for risks (components, certification) is also prudent.

Should I outsource or recruit in-house?

It depends on your project volume, your core business and your time horizon. Outsourcing offers flexibility and immediate access to varied skills. In-house suits companies with a continuous flow of developments. Read our Make or Buy analysis for a complete decision framework.

Does AESTECHNO offer free estimates?

Yes. We offer a first 30-minute exchange to understand your need and provide a phase-by-phase estimate. This exchange is free and non-binding. Contact us at contact@aestechno.com or via our contact form.

This selection of related articles is a reading path that lets you dig deeper into the complementary aspects of budget estimation: scoping, DFM, industrialization, certification and outsourcing strategies.