SoC vs SoM vs SBC vs custom: how to choose right in 2026

On a recent industrial-equipment project running at 1k-10k units per year with a 12-year target lifetime, we picked a custom carrier around a bare System on Chip (SoC) i.MX 8M Plus over an off-the-shelf System on Module (SoM). Contrary to the common assumption that SoM always wins at mid-volume, intellectual property ownership, second-source, and form factor swing the call the other way. At AESTECHNO, an electronics design house based in Montpellier, we arbitrate this choice on four measurable criteria. Updated May 2026.

Contents

• What is a SoC, a SoM, an SBC, and a custom design?
• Why this decision weighs on 5-15 years of roadmap
• Comparison table of the four architectures
• Criterion 1: production volume and BoM crossover
• Criterion 2: product lifetime and supplier longevity
• Criterion 3: intellectual property and second-source
• Criterion 4: mechanical integration and form factor
• Field report: i.MX 8M Plus custom over SoM in industrial
• When SoM is still the right answer (and when SBC kills the project)
• AESTECHNO methodology: six steps to arbitrate
• Bottom line
• FAQ

What is a SoC, a SoM, an SBC, and a custom design?

A System on Chip (SoC) is the raw application-processor silicon, shipped in QFN, BGA or LGA packaging, on which the team designs its own PCB. A System on Module (SoM) is that same SoC already integrated with its DDR, its Power Management Integrated Circuit (PMIC) and its flash on a standardised mini-PCB. A Single Board Computer (SBC) is a full ready-to-plug board. A custom design covers the whole thing, from silicon choice to the mechanical enclosure. Each option loads the PCB stackup, via routing, and the Board Support Package (BSP) firmware differently.

These four levels of hardware integration map to four levels of effort, risk, and intellectual-property ownership. The bare SoC (i.MX 8M Plus, STM32MP257, Renesas RZ/G3S, AMD Versal AI Edge) is the most demanding: DDR or LPDDR4 routing on at least four layers, PMIC sizing, Ethernet PHY integration, HDMI or MIPI-DSI, USB lanes, and the BSP. The return on that effort is full mastery of the board, firmware, and at-volume cost.

The SoM abstracts the high-speed complexity. The Variscite VAR-SOM-MX8M-PLUS, Toradex Verdin iMX8M Plus, Compulab UCM-iMX8M-Plus, or Phytec phyCORE-i.MX 8M Plus pack the application processor, LPDDR4, PMIC and eMMC onto a qualified mini-PCB, shipped with its Yocto Linux BSP and carrier-board documentation. The team only routes low-speed signals to the SO-DIMM or MXM connector, which cuts the high-speed risk and accelerates bring-up.

The SBC (Raspberry Pi CM4 IO board, BeagleBone Black, Variscite SOM-MX8M-Plus EVK) is a complete board built for prototyping and demonstration. Its component lifecycle stays short (3 to 5 years typical), its form factor is not customisable, and firmware mastery is partial. A custom design covers the whole chain, from silicon choice to EMC routing to mechanics and certification: the default option at AESTECHNO on the majority of serious industrial projects.

Before the numbered criteria, the table below summarises the project profile each architecture fits best, across dimensions that complement the volume / lifetime matrix: supply risk, CE / FCC certification effort, required in-house expertise, and ideal project profile.

Architecture	Supply and obsolescence risk	CE / FCC certification effort	Required in-house expertise	Ideal project profile
Bare SoC	controlled: plannable second-source, chosen silicon grade	high: full dossier, conformance through stackup	strong: DDR routing, BSP, EMC qualification	experienced team targeting high-volume BoM optimisation
SoM	moderate: depends on the module vendor longevity	moderate: reusable SoM pre-compliance, final test mandatory	moderate: low-speed carrier, BSP supplied	first product, team with no internal embedded Linux
SBC	high: short lifecycle, frequent post-launch redesign	redo from scratch: full certification on assembled product	low: software integration only	prototype, demonstrator, market validation
Custom carrier + SoC	controlled: AP second-source planned at spec time	high: full dossier, Class A or B targeted at design	strong, or a partner design office	industrial production 1k to 100k / year, 7 to 15 years life

Why this decision weighs on 5-15 years of roadmap

The hardware-architecture choice for an IoT or industrial product locks the programme trajectory for its entire commercial life: time to first series, unit cost at mid-volume, margin at mature volume, ability to weather a component crisis, and supplier-side autonomy. A bad call at specification time costs for eight to fifteen years.

The cost is never the one on the first purchase order. The Non-Recurring Engineering (NRE) of bare SoC absorbs 12 to 24 senior-engineer weeks for carrier routing, BSP, thermal qualification, and EMC pre-compliance. SoM cuts that bring-up by 3 to 6 months by standardising the CPU + memory + PMIC + flash subsystem, but it stacks a recurring unit-cost premium across the product's whole life. According to NXP, the guaranteed lifetime on industrial-longevity i.MX references exceeds 15 years, which aligns bare-SoC paths with industrial-equipment horizons.

Add the certification dimension. A Variscite or Toradex SoM shipped with a CE / FCC pre-compliance file shortens the accredited-lab pass, but that pre-compliance never waives a final test on the assembled product under CISPR 32 / EN 55032 Class B. Custom imposes a complete dossier but lets the design target Class A or B via stackup and ground plane discipline rather than late shielding layers. Per IPC, complying with IPC-2221 and IPC-A-610 conditions production conformance regardless of the SoC vs SoM call.

Comparison table of the four architectures

The table below synthesises the four options across seven key dimensions. Values come from AESTECHNO field feedback on industrial and IoT projects using i.MX 8M Plus, STM32MP1, and NVIDIA Jetson Orin between 2022 and 2026.

Criterion	Bare SoC	SoM	SBC	Custom carrier + SoC
Initial time-to-market	12 to 18 months	6 to 10 months	2 to 4 months (proto)	10 to 14 months
Typical NRE	high (silicon + full carrier)	moderate (low-speed carrier)	low (software integration)	high (bare-SoC equivalent)
Unit BoM	optimised at 100k+	25 to 60 percent premium	50 to 100 percent premium	optimisable at 1k to 100k
Form factor	free, constrained by DDR routing	imposed by SoM (SO-DIMM, MXM)	fully imposed	free, under IPC-2221
Intellectual property	full (customer)	shared (SoM vendor)	limited (board vendor)	full (customer)
Target lifetime	10 to 15 years (i.MX industrial-longevity)	5 to 10 years (vendor policy)	3 to 5 years (frequent revisions)	10 to 15 years (chosen SoC)
AP second-source	plannable at spec	depends on SoM vendor	none	plannable at spec

Two qualitative breaks fall out of the table. The SBC drops out of contention for any serious production. The bare SoC and the custom carrier sit in the same qualitative zone (custom carrier is in practice the industrial materialisation of a bare SoC). The real debate sits between SoM and custom, and it gets resolved on the four criteria below.

Criterion 1: production volume and BoM crossover

The BoM crossover is the cumulative production volume at which the custom-carrier path becomes cheaper than the SoM path, once the custom NRE is absorbed by the per-unit BoM saving. It is the intersection point of the two cumulative-cost curves, and it serves as the numbers-backed pivot for any SoC versus SoM arbitration.

Annual production volume decides whether amortising custom NRE crosses below the SoM unit-cost premium. The empirical rule we apply: below 500 units/year SoM wins, above 5,000 units custom amortises, and between the two the call needs a calculated crossover.

The exact threshold depends on three variables: the negotiated SoM price (typically 80 to 250 euros HT per i.MX 8M Plus module), the custom-BoM premium versus SoM (usually 25 to 60 percent lower per unit once NRE is absorbed), and custom NRE (typically a few tens to a few hundreds of thousands of euros depending on complexity). On a 5-year horizon at 5,000 units/year, the cumulative gap easily reaches hundreds of thousands of euros in favour of custom.

In our practice, we insist on calculating this crossover threshold before signing the specification, not after. The calculation takes about an hour and structures the customer conversation objectively. According to NXP, the industrial-longevity programmes on qualified i.MX 8M Plus references cover 15 years, which widens the zone where custom amortises comfortably.

Criterion 2: product lifetime and supplier longevity

Target product lifetime (3, 5, 10 or 15 years) sets the hardware-maintenance path and the supplier-dependence horizon. A product expected to stay in commercial series for 10 years has to align its architecture with a silicon supplier that commits formally on that horizon, independent of the SoM vs custom call.

Supplier longevity programmes have become a structuring decision criterion. NXP offers its Product Longevity Program with a minimum 10- or 15-year commitment on industrial-grade i.MX references. STMicroelectronics aligns its STM32MP1 and STM32MP2 lines on a minimum 10 years through the STM32 Longevity programme. Renesas applies its Renesas Reliability Program to RZ/G3 over a similar horizon. Conversely, consumer-grade SoMs (Raspberry Pi CM4 outside the longevity track, certain low-end ARM modules) ride on 3-5-year cycles, which rules them out for long industrial production.

Contrary to the common assumption that SoM always offers longer life than bare SoC, we have observed that a SoM built on a consumer-grade SoC inherits the short cycles of its underlying silicon. By contrast, a custom carrier around an industrial i.MX 8M Plus inherits NXP's 15 years regardless of the SoM ecosystem. The practical rule: align the silicon grade with product lifetime first, then choose SoM or custom on the other criteria.

Criterion 3: intellectual property and second-source

Intellectual property (IP) here means the full set of design files (schematics, layout, gerbers, BSP, production scripts, certification dossiers) that define the product. SoM transfers part of that IP to the module vendor, who owns the reference carrier design, BSP, and drivers. Custom repatriates that IP to the buyer.

The second-source stake follows directly from IP. On a custom design around an i.MX 8M Plus, the buyer can plan a multi-source strategy at specification time: NXP i.MX 8M Plus as primary source, NXP i.MX 8M Mini or equivalent variant as backup, even a documented fallback to STM32MP2 in the design phase to absorb a catastrophic disruption. On a SoM, second-source is limited to what the module vendor offers, which shrinks the manoeuvre room against a component shortage or a vendor commercial-strategy shift.

On a recent project, in our AESTECHNO lab in Montpellier, we supported an industrial player who wanted to keep full control over the BoM in order to negotiate directly with NXP, Murata, Microchip, and tier-2 PCB fabs. A SoM would have forced a single procurement channel. Custom around the i.MX 8M Plus opened the supplier portfolio and weakened vendor lock-in. This sovereignty dimension has become a structuring 2026 argument, in continuity with the Cyber Resilience Act and the European critical-raw-materials regulation.

Criterion 4: mechanical integration and form factor

A form factor is the standardised set of dimensions, connector position, and pinout that defines a board's physical footprint. A SoM imposes its form factor (SO-DIMM 200, MXM, Q7, SMARC), whereas a custom carrier board lets the team set the outline freely, under the IPC-2221 design rules alone.

The mechanical integration of the final product drives form-factor constraints on the motherboard. An IP65 industrial enclosure with passive thermal dissipation, a medical equipment with sterilisation constraints, an autonomous vehicle with vibration and shock budget: each case imposes a layout that the standardised SoM form factors (SO-DIMM 200, MXM, Q7, SMARC) can't always accept.

The dominant SoM form factors in 2026 are SO-DIMM 200 (Variscite VAR-SOM), MXM 314 pins (Compulab UCM), SMARC 2.1 (Phytec phyBOARD, Kontron), and Q7 (Toradex Apalis and Verdin in its own standard). Each freezes the main connector position, the dissipation area, and the expansion pinout. If the product targets a flat 18 mm-thick enclosure with a constrained power connector position, the SoM might need an additional daughter card to meet mechanical spec, which cancels its time-to-market advantage.

Custom around an i.MX 8M Plus lets the application processor sit exactly where the mechanics demand, manages thermal dissipation with a continuous ground plane under the BGA die, and aligns connectors with enclosure cutouts. On a high-density industrial computer project we ran, custom routing was the only way to hold a 60 mm enclosure depth with a DDR4 stack and a 1000BASE-T1 Ethernet TSN, where the SoM SO-DIMM imposed 75 mm minimum. The field experience confirms: on constrained enclosures, form factor is rarely negotiable.

Field report: i.MX 8M Plus custom over SoM in industrial

On a recent industrial-equipment project at 1k-10k annual units and 12-year product lifetime, in our AESTECHNO lab in Montpellier we measured on the Tektronix TekExpress bench an LPDDR4 signal-integrity margin of 18 out of 20 trials after two stackup iterations. Our hardware qualification methodology stays constant on every i.MX project: pre-compliance characterisation on the Tektronix TekExpress bench in a semi-anechoic chamber, CISPR 32 / EN 55032 sweep from 30 megahertz to 6 gigahertz, parasitic-coupling simulation on ANSYS SIwave and HyperLynx, BSP audit against the applicable Linux LTS kernel versions for Yocto, Buildroot and FreeRTOS workloads, thermal qualification in -40 / +85 degree Celsius climate chambers per IEC 60068-2-1 and IEC 60068-2-2. Contrary to the common assumption that a SoM automatically shortens the project calendar, we found that the form-factor cost (SO-DIMM 200 imposed a 25 percent depth excess over our mechanical spec) and the vendor BSP dependence cancelled the theoretical 4-month head-start. Despite a strong customer preference to de-risk the high-speed work by starting on SoM, we recommend systematically calculating the BoM-at-volume crossover and the IP audit before signing the spec, which flips the decision on roughly two out of three mid-volume industrial projects. The field report from our team on product design and on embedded Linux distribution porting (Yocto, Buildroot and FreeRTOS) on i.MX 8M Plus, STM32MP2, and Renesas RZ/G3 confirms: at 12-year target lifetime, full intellectual property and second-source planning weigh more than shortened time-to-market. In our practice across industrial projects, we have observed that customers who raise the IP question at spec time are also the ones who best value a multi-source strategy at production time, in line with ISO 31000 risk-management principles and IEC 62443 recommendations for industrial cybersecurity.

When SoM is still the right answer (and when SBC kills the project)

An SBC (Single Board Computer) is a complete, self-contained board, shipped with its own power supply, connectors, and interfaces, built first for prototyping and demonstration rather than long industrial production. The Raspberry Pi CM4 IO Board and the BeagleBone Black are the most widely used examples in design offices.

SoM keeps its clear edge in four well-identified situations. Conversely, SBC stays reserved for prototyping and shows serious limits the moment it shifts to production. Naming those zones avoids pulling the call towards the wrong architecture by habit or vendor marketing.

SoM wins in: (1) a first product at a team without internal embedded-Linux expertise, where the BSP shipped by Variscite, Toradex, or Compulab cuts bring-up by 3 to 6 months; (2) volumes below 500 units/year where custom NRE never amortises; (3) a short product lifetime (3 to 5 years), typical of limited-series prototypes or fast-roadmap products; (4) a mechanical spec compatible with SO-DIMM 200, MXM, or Q7 with no exotic constraint. In those cases SoM is not a compromise; it's the optimal option.

SBC, by contrast, almost always fails in production series, and for documented reasons. Component lifecycle often short (3 to 5 years, sometimes less), form factor fully imposed, IO and connectors non-negotiable, CE / FCC certification still required on the assembled product even when the SBC carries a mark. Contrary to the common assumption that the Raspberry Pi CM4 IO Board is a viable entry path to series, we have observed that post-launch redesigns due to SBC obsolescence frequently exceed the cost of a custom carrier from the first production renewal. SBC stays a great prototyping tool, even a market-validation device, but final industrialisation almost always rides a SoM or a custom.

AESTECHNO methodology: six steps to arbitrate SoC, SoM, SBC, custom

The methodology we apply systematically at AESTECHNO to arbitrate these four options has six measurable steps. It sits inside our industrial product design approach and lets us quantify the call before a single schematic line is drawn. Each step produces a deliverable the customer can audit.

Step 1: target volume characterisation over five years, with low, mid, and high assumption ranges. This fixes the amortisation horizon. Step 2: product-lifetime characterisation (3, 5, 10, 15 years), maintenance horizon, and obsolescence constraints. Step 3: intellectual-property audit and second-source strategy, mandatory for industrial players under CRA or the EU critical-raw-materials regulation. Step 4: mechanical specification including form factor, thermal, vibration, and shock constraints per IEC 60068.

Step 5: comparative NRE quote on the four retained options, with MOA / MOE breakdown and schedule-risk estimate. The NRE (Non-Recurring Engineering) is the one-time engineering cost spent once to take a custom carrier board from specification to first series, as opposed to the recurring per-unit BoM cost. Step 6: weighted decision matrix combining the previous five steps and producing a numbers-backed call, defendable to the product, procurement, and finance directors. The whole methodology fits in four weeks maximum and lets a customer sign a hardware specification with a structured argument rather than a vendor intuition.

This arbitration grid plugs into our wider electronic product development cost analysis: a BSP (Board Support Package) is the software layer, bootloader, and drivers that adapt a Linux kernel to the chosen silicon, and its porting cost weighs as much in the NRE as the hardware routing. Time-to-market is never the only criterion: planning an application-processor second-source at specification time protects the programme against obsolescence and against a component break across the 10 to 15 years of product life. A custom carrier board designed to the IPC-2221 standards also eases the CE / FCC certification tests, because the stackup and ground plane are controlled from the start rather than patched with late shielding.

Bottom line

The SoC vs SoM vs SBC vs custom call is an architectural decision that defines the hardware roadmap of an IoT or industrial product for 5 to 15 years. The SBC drops out for production series, and bare SoC effectively merges with custom carrier in actual arbitration. The real debate sits between SoM and custom and settles on four measurable criteria.

• Volume: below 500 units/year SoM wins, above 5,000 custom amortises, between the two compute the crossover.
• Lifetime: align the silicon grade (NXP industrial-longevity, STM32 Longevity, Renesas Reliability) with target lifetime before picking SoM or custom.
• Intellectual property: custom keeps full IP and opens AP second-source; SoM shares IP with the module vendor.
• Form factor: SO-DIMM 200, MXM, SMARC, or Q7 impose their constraints; when the mechanics are exotic, custom is the only option.
• AESTECHNO methodology: six measurable steps, four weeks maximum, a numbers-backed call instead of a vendor intuition.

Frequently asked questions

When is SoM preferable to a custom carrier on i.MX 8M Plus?

A Variscite, Toradex, Compulab, or Phytec SoM wins when the annual volume is under 500 units, when the team has no internal embedded-Linux expertise, or when the SO-DIMM / MXM / SMARC form factor is compatible with the mechanical spec. Above 5,000 annual units, over 7 to 15 years of product life, with a full intellectual-property requirement, the custom carrier around a bare i.MX 8M Plus becomes the near-systematic winner.

Can a Raspberry Pi SBC go into production?

The Raspberry Pi CM4 IO Board or BeagleBone stay reserved for prototyping and demonstration. Their short component lifecycle (3 to 5 years), non-customisable form factor, and near-certain post-launch redesigns disqualify them for long industrial production. Industrial actors who try direct industrialisation almost always end up redesigning custom at the first stock renewal, which costs more globally than starting on SoM or custom in the first place.

What is the economic crossover between SoM and custom carrier?

The crossover comes from comparing custom NRE (silicon + carrier + BSP + EMC qualification) to the SoM recurring unit-cost premium (25 to 60 percent in industrial i.MX 8M Plus depending on module). On a 5,000-units/year project over 5 years, custom typically amortises NRE in 12 to 18 months and releases meaningful cumulative gain afterwards. The exact maths depend on negotiated SoM price, custom BoM premium, and project NRE.

Which application processors does AESTECHNO master?

We regularly design custom carriers around NXP i.MX (8M Plus, 93, 95) and i.MX RT, ST STM32MP1 / MP2, Renesas RZ/G3 and RZ/V, plus NVIDIA Jetson Orin Nano / NX / AGX for AI edge workloads. BSP work rides on Yocto, Buildroot or Debian by project profile. For pure MCU work (Cortex-M4, M7, M33) we cover STM32, Nordic nRF52 / nRF54, Espressif ESP32, and Microchip SAM.

How does AESTECHNO plan an application-processor second-source?

AP second-source strategy is set at specification time, not in reaction to a shortage. On a custom i.MX 8M Plus, we typically document two pin-compatible variants (i.MX 8M Mini, i.MX 93 depending on performance target), plus a fallback to STM32MP2 or Renesas RZ/G3 documented in the design phase to absorb a catastrophic family-level break. This planning ties into our component shortage methodology and supports Cyber Resilience Act compliance for industrial IoT products.

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