Skip to content
AESTECHNO
Pinout

Raspberry Pi pinout: the 40-pin GPIO header

The Raspberry Pi 40-pin GPIO header (B+ through Pi 2, 3, 4 and 5, and every Zero) carries two 3.3 V pins, two 5 V pins, eight grounds, 26 GPIOs and two ID EEPROM pins, all 3.3 V logic and not 5 V tolerant. The physical pin number (1 to 40) differs from the BCM GPIO number used in code.

By Hugues Orgitello · Updated ·

40-pin GPIO header, 2.54 mm pitch

Physical and BCM GPIO numbers are the same from Pi 1 B+ to Pi 5 and on the Zero boards. Pi 1 to 4 column: alternate functions shared by BCM2835 and BCM2711 (Pi 4 adds more). Pi 5 column: RP1 functions on the same buses (aN = FUNCSEL N). The pull-ups mentioned are on the board.

Raspberry Pi GPIO · 40-pin GPIO header, 2.54 mm pitch. Board seen from above, component side, header along the top edge as in the official diagram: pin 1 (square) at bottom left, pin 40 at top right, even row on the board edge. On keyboard models (400, 500) the header is rotated 180 degrees..
Board seen from above, component side, header along the top edge as in the official diagram: pin 1 (square) at bottom left, pin 40 at top right, even row on the board edge. On keyboard models (400, 500) the header is rotated 180 degrees.
Pin Signal Dir. BCM GPIOAlt functions Pi 1 to 4Pi 5 (RP1) Description
1 3V3 --- 3.3 V supply from the board, for low-current loads (Power)
2 5V --- Board 5 V, as an output; or 5 V power input (power HAT, PoE) (Power)
3 SDA1 I/O 2ALT0 SDA1 (I2C1)a3 I2C1_SDA I2C1 data; 1.8 kOhm pull-up to 3.3 V on the board (Signal)
4 5V --- Board 5 V, as an output; or 5 V power input (power HAT, PoE) (Power)
5 SCL1 I/O 3ALT0 SCL1 (I2C1)a3 I2C1_SCL I2C1 clock; 1.8 kOhm pull-up to 3.3 V on the board (Signal)
6 GND --- Ground (Ground)
7 GPCLK0 I/O 4ALT0 GPCLK0a0 GPCLK[0] General-purpose clock 0 output, or general I/O (Signal)
8 TXD I/O 14ALT0 TXD0 (UART0), ALT5 TXD1 (mini UART)a4 UART0_TX, a0 PWM0[2] Primary UART transmit (UART0, or the mini UART on Pi 3, 4 and Zero W) (Signal)
9 GND --- Ground (Ground)
10 RXD I/O 15ALT0 RXD0 (UART0), ALT5 RXD1 (mini UART)a4 UART0_RX, a0 PWM0[3] Primary UART receive (UART0, or the mini UART on Pi 3, 4 and Zero W) (Signal)
11 GPIO17 I/O 17ALT3 RTS0, ALT4 SPI1_CE1_N, ALT5 RTS1a0 SPI1_CSn[1], a4 UART0_RTS General I/O; SPI1 chip enable CE1 (Signal)
12 PCM_CLK I/O 18ALT0 PCM_CLK, ALT4 SPI1_CE0_N, ALT5 PWM0_0a0 SPI1_CSn[0], a2 I2S0_SCLK, a3 PWM0[2] PCM/I2S audio clock; SPI1 CE0; PWM (Signal)
13 GPIO27 I/O 27ALT4 ARM_TMS (JTAG)- No dedicated function: general-purpose I/O (Signal)
14 GND --- Ground (Ground)
15 GPIO22 I/O 22ALT4 ARM_TRST (JTAG)- No dedicated function: general-purpose I/O (Signal)
16 GPIO23 I/O 23ALT4 ARM_RTCK (JTAG)- No dedicated function: general-purpose I/O (Signal)
17 3V3 --- 3.3 V supply from the board, for low-current loads (Power)
18 GPIO24 I/O 24ALT4 ARM_TDO (JTAG)- No dedicated function: general-purpose I/O (Signal)
19 SPI0_MOSI I/O 10ALT0 SPI0_MOSIa0 SPI0_SIO[0] (MOSI) SPI0 data, controller to peripheral (Signal)
20 GND --- Ground (Ground)
21 SPI0_MISO I/O 9ALT0 SPI0_MISOa0 SPI0_SIO[1] (MISO) SPI0 data, peripheral to controller (Signal)
22 GPIO25 I/O 25ALT4 ARM_TCK (JTAG)- No dedicated function: general-purpose I/O (Signal)
23 SPI0_SCLK I/O 11ALT0 SPI0_SCLKa0 SPI0_SCLK SPI0 clock (Signal)
24 SPI0_CE0_N I/O 8ALT0 SPI0_CE0_Na0 SPI0_CSn[0] SPI0 chip enable 0, active low (Signal)
25 GND --- Ground (Ground)
26 SPI0_CE1_N I/O 7ALT0 SPI0_CE1_Na0 SPI0_CSn[1] SPI0 chip enable 1, active low (Signal)
27 ID_SD I/O 0ALT0 SDA0 (I2C0)a3 I2C0_SDA HAT ID EEPROM I2C data; nothing else on this pin (Configuration)
28 ID_SC I/O 1ALT0 SCL0 (I2C0)a3 I2C0_SCL HAT ID EEPROM I2C clock; nothing else on this pin (Configuration)
29 GPCLK1 I/O 5ALT0 GPCLK1a0 GPCLK[1] General-purpose clock 1 output, or general I/O (Signal)
30 GND --- Ground (Ground)
31 GPCLK2 I/O 6ALT0 GPCLK2a0 GPCLK[2] General-purpose clock 2 output, or general I/O (Signal)
32 PWM0_0 I/O 12ALT0 PWM0_0a0 PWM0[0] PWM output, channel 0 (Signal)
33 PWM0_1 I/O 13ALT0 PWM0_1a0 PWM0[1] PWM output, channel 1 (Signal)
34 GND --- Ground (Ground)
35 PCM_FS I/O 19ALT0 PCM_FS, ALT4 SPI1_MISO, ALT5 PWM0_1a0 SPI1_SIO[1] (MISO), a2 I2S0_WS, a3 PWM0[3] PCM/I2S audio frame sync; SPI1 MISO; PWM (Signal)
36 GPIO16 I/O 16ALT3 CTS0, ALT4 SPI1_CE2_N, ALT5 CTS1a0 SPI1_CSn[2], a4 UART0_CTS General I/O; SPI1 chip enable CE2 (Signal)
37 GPIO26 I/O 26ALT4 ARM_TDI (JTAG)- No dedicated function: general-purpose I/O (Signal)
38 PCM_DIN I/O 20ALT0 PCM_DIN, ALT4 SPI1_MOSI, ALT5 GPCLK0a0 SPI1_SIO[0] (MOSI), a2 I2S0_SDI[0], a3 GPCLK[0] PCM/I2S audio data in; SPI1 MOSI (Signal)
39 GND --- Ground (Ground)
40 PCM_DOUT I/O 21ALT0 PCM_DOUT, ALT4 SPI1_SCLK, ALT5 GPCLK1a0 SPI1_SCLK, a2 I2S0_SDO[0], a3 GPCLK[1] PCM/I2S audio data out; SPI1 clock (Signal)

Pi 1 Model A and B: 26-pin P1 header, revisions 1 and 2

Only pins 3, 5 and 13 change BCM GPIO between revision 1 (PCBs from September 2012 or earlier) and revision 2. Pins 4, 9, 14, 17, 20 and 25, marked DNC in the first documentation, do carry 5 V, 3.3 V and ground. Revision 2 matches the first 26 pins of the 40-pin header.

Raspberry Pi GPIO · Pi 1 Model A and B: 26-pin P1 header, revisions 1 and 2. Board seen from above, component side: pin 1 (square) in the first column, on the bottom row.
Board seen from above, component side: pin 1 (square) in the first column, on the bottom row
Pin Signal Dir. Revision 1 (BCM GPIO)Revision 2 (BCM GPIO) Description
1 3V3 -- 3.3 V supply (Power)
2 5V -- 5 V after the input polyfuse (Power)
3 SDA0 / SDA1 I/O GPIO0 (SDA0)GPIO2 (SDA1) I2C data: I2C0 bus on revision 1, I2C1 on revision 2; 1.8 kOhm pull-up (Signal)
4 5V -- 5 V (marked DNC on revision 1) (Power)
5 SCL0 / SCL1 I/O GPIO1 (SCL0)GPIO3 (SCL1) I2C clock: I2C0 bus on revision 1, I2C1 on revision 2; 1.8 kOhm pull-up (Signal)
6 GND -- Ground (Ground)
7 GPCLK0 I/O GPIO4GPIO4 General-purpose clock 0, or general I/O (Signal)
8 TXD0 I/O GPIO14GPIO14 UART0 transmit, default serial console (Signal)
9 GND -- Ground (marked DNC on revision 1) (Ground)
10 RXD0 I/O GPIO15GPIO15 UART0 receive (Signal)
11 GPIO17 I/O GPIO17GPIO17 No dedicated function: general-purpose I/O (Signal)
12 PCM_CLK I/O GPIO18GPIO18 PCM clock, or PWM (ALT5) (Signal)
13 GPIO21 / GPIO27 I/O GPIO21GPIO27 General I/O; GPIO27 on revision 2, which brings ARM_TMS to the header (Signal)
14 GND -- Ground (marked DNC on revision 1) (Ground)
15 GPIO22 I/O GPIO22GPIO22 No dedicated function: general-purpose I/O (Signal)
16 GPIO23 I/O GPIO23GPIO23 No dedicated function: general-purpose I/O (Signal)
17 3V3 -- 3.3 V supply (marked DNC on revision 1) (Power)
18 GPIO24 I/O GPIO24GPIO24 No dedicated function: general-purpose I/O (Signal)
19 SPI0_MOSI I/O GPIO10GPIO10 SPI0 data, controller to peripheral (Signal)
20 GND -- Ground (marked DNC on revision 1) (Ground)
21 SPI0_MISO I/O GPIO9GPIO9 SPI0 data, peripheral to controller (Signal)
22 GPIO25 I/O GPIO25GPIO25 No dedicated function: general-purpose I/O (Signal)
23 SPI0_SCLK I/O GPIO11GPIO11 SPI0 clock (Signal)
24 SPI0_CE0_N I/O GPIO8GPIO8 SPI0 chip enable 0, active low (Signal)
25 GND -- Ground (marked DNC on revision 1) (Ground)
26 SPI0_CE1_N I/O GPIO7GPIO7 SPI0 chip enable 1, active low (Signal)
An interface to design?

A HAT or add-on board to design for Raspberry Pi, with ID EEPROM, power through the header and I/O protection? We handle the electronic design and layout.

Physical number or BCM number?

The physical number follows the position on the header: odd pins on the inner row, even pins on the board-edge row. Code uses the processor GPIO number instead (BCM numbering): pin 11 is GPIO17, pin 3 is GPIO2. On a Raspberry Pi, the pinout command prints the mapping.

The first 26 pins repeat the P1 header of revision 2 Pi 1 A and B boards; revision 1 differs on pins 3, 5 and 13 (see the table above). On Pi 5, the RP1 I/O controller drives the GPIO instead of the processor, but its functions were placed to match the Pi 4 header: BCM numbers and the main buses do not change.

Position of the 40-pin header on a Pi 4 or Pi 5 and on a Zero, boards seen from above, at the same scale Raspberry Pi 4 / Pi 5 · 85 × 56 mm GPIO header, pin 1 at left Raspberry Pi Zero / Zero 2 W · 65 × 30 mm GPIO header, pin 1 at left
Position of the 40-pin header on a Pi 4 or Pi 5 and on a Zero, boards seen from above, at the same scale Outlines (85 x 56 mm, 65 x 30 mm) and header centre 32.5 mm from the left edge (3.5 + 29 mm): Raspberry Pi 4, Pi 5 and Zero 2 W mechanical drawings. Centre 3.5 mm from the top edge: Pi 4 drawing dimension; on Pi 5 and Zero 2 W the header sits on the mounting-hole line, 3.5 mm from the edge. Drawn zone: 20 x 2 pins at 2.54 mm pitch, i.e. 50.8 x 5.08 mm.

Logic levels and current

3.3 V, not 5 V. The GPIOs are not 5 V tolerant; a 5 V signal applied directly can destroy the processor. A 5 V sensor or module needs a level shifter. Only pins 2 and 4 carry 5 V.

Current. The Raspberry Pi documentation gives up to 16 mA per pin and 50 mA in total for all GPIOs together. The drive-strength setting is not a current limit: it is the current up to which the output levels stay guaranteed. On Pi 4 (BCM2711) the default drive is 4 mA and the maximum 8 mA; on Pi 5 the RP1 offers 2, 4, 8 or 12 mA. An LED needs a series resistor, a motor or relay needs a driver stage.

3.3 V rail. Raspberry Pi states that the 3.3 V supply was designed for about 3 mA per GPIO, and does not publish a current rating for pins 1 and 17 in these documents: keep them for logic and sensors, and power anything else from 5 V through your own regulator. Since Pi 4, the STANDBY state keeps 5 V on and turns 3.3 V off: an add-on board must cope with it. Never connect a power source to the 3.3 V pins.

Pull-ups and power-on state

GPIO2 and GPIO3 (pins 3 and 5) have fixed 1.8 kOhm pull-ups to 3.3 V on the board (the HAT+ specification says about 2 kOhm). No need to add more on the I2C module; they also prevent using these pins as pulled-down inputs.

At power-on, every pin is an input with a weak pull. On BCM2835 and BCM2711, GPIO0 to GPIO8 start with a pull-up and GPIO9 to GPIO27 with a pull-down. The HAT+ specification asks boards to tolerate either: if a signal on your board must hold a defined state at power-on (power-stage enable, reset), fit an external resistor.

Pins 27 and 28: the ID EEPROM

ID_SD (GPIO0) and ID_SC (GPIO1) are reserved for a HAT ID EEPROM. The only allowed connections are the EEPROM and two 3.9 kOhm pull-ups to 3.3 V, on the add-on board. At boot, the firmware reads the EEPROM and loads the Device Tree overlay it names.

The HAT+ specification requires a 3.3 V 24Cxx I2C EEPROM with 16-bit addressing, no clock stretching and no address-bit paging, and a WP pin that protects the whole array; 100 kHz is enough. It recommends the CAT24C32, with WP pulled to 3.3 V through 1 kOhm and routed to a test point for production programming.

Powering the Pi through the 5 V pins

Pins 2 and 4 can power the Pi (PoE HAT, power board). The original HAT guide states that these pins join the 5 V net after the polyfuse and input diode: this path bypasses the input protection. The HAT+ specification requires a power board to supply at least 3 A at 5.1 V (5 A recommended), to only source current and to stay safe when USB-C power is plugged in at the same time.

The original HAT design guide recommended an ideal diode on the add-on board side, especially since Pi 3B+, 4B and Zero have no ideal diode on their 5 V input. When in doubt, we fit one.

Which UART is on pins 8 and 10?

On models with Bluetooth (Pi 3, Pi 4, Zero W, Zero 2 W), the full PL011 UART is taken by Bluetooth and GPIO14/GPIO15 carry the mini UART by default, which is less robust (no parity, baud rate tied to the VPU clock). On Pi 5, the console uses the dedicated 3-pin debug header (UART10); UART0 on GPIO14/GPIO15 is disabled by default and is enabled in config.txt. Every UART runs at 3.3 V.

What changes on Pi 5

Same pins, same BCM numbering, same main buses (I2C1, SPI0, SPI1, UART0, PWM, GPCLK), but everything goes through RP1. Differences that matter for design: input thresholds of 0.8 V and 2.0 V, internal pull-ups of 37 to 86 kOhm and pull-downs of 35 to 98 kOhm, drive selectable at 2, 4, 8 or 12 mA, four PWM channels (PWM0[2] and PWM0[3] also on GPIO14/15 and GPIO18/19), audio named I2S instead of PCM, and no mini UART.

Frequently asked questions

FAQ

Are Raspberry Pi GPIOs 5 V tolerant?
No. The GPIOs run at 3.3 V and a 5 V signal applied directly can permanently damage the processor. Use a level shifter, or a module or serial cable designed for 3.3 V.
How much current can a GPIO pin supply?
The Raspberry Pi documentation gives up to 16 mA per pin and 50 mA in total for all GPIOs. The drive setting (8 mA maximum on Pi 4, 12 mA on Pi 5) sets the current up to which levels stay guaranteed, not a limit. Beyond an LED, use a transistor or a driver.
Which pins should be used for I2C?
Pins 3 (GPIO2, SDA1) and 5 (GPIO3, SCL1), which already have 1.8 kOhm pull-ups on the board. Pins 27 and 28 also carry an I2C bus, but it is reserved for the HAT ID EEPROM: connect nothing else there.
Can a Raspberry Pi be powered through the GPIO 5 V pins?
Yes, that is what PoE HATs and power boards do. This path bypasses the board input protection: the source must be regulated, only source current, supply at least 3 A at 5.1 V per the HAT+ specification, and stay safe if USB-C is plugged in at the same time.
Is the Raspberry Pi 5 GPIO pinout different?
Not for pins and main buses: same BCM numbers, with I2C1, SPI0, SPI1, UART0 and PWM in the same places. The I/Os go through the RP1 controller, with different drive and pull settings, I2S audio, and the serial console moved to a dedicated header.
Sources

Tables built from these documents and cross-checked against manufacturer datasheets. Always check the datasheet of the connector you actually use: some manufacturers number differently.

Further reading

Other pinouts